1 (**************************************************************************)
4 (* ||A|| A project by Andrea Asperti *)
6 (* ||I|| Developers: *)
7 (* ||T|| The HELM team. *)
8 (* ||A|| http://helm.cs.unibo.it *)
10 (* \ / This file is distributed under the terms of the *)
11 (* v GNU General Public License Version 2 *)
13 (**************************************************************************)
15 (* ********************************************************************** *)
16 (* Progetto FreeScale *)
18 (* Sviluppato da: Cosimo Oliboni, oliboni@cs.unibo.it *)
19 (* Cosimo Oliboni, oliboni@cs.unibo.it *)
21 (* ********************************************************************** *)
23 include "freescale/status.ma".
25 (* *********************************** *)
26 (* IMPOSTAZIONI SPECIFICHE DEI MODELLI *)
27 (* *********************************** *)
30 ninductive HC05_mcu_model : Type ≝
31 MC68HC05J5A: HC05_mcu_model
34 ndefinition HC05_mcu_model_ind : ΠP:HC05_mcu_model → Prop.P MC68HC05J5A → Πh:HC05_mcu_model.P h ≝
35 λP:HC05_mcu_model → Prop.λp:P MC68HC05J5A.λh:HC05_mcu_model.
36 match h with [ MC68HC05J5A ⇒ p ].
38 ndefinition HC05_mcu_model_rec : ΠP:HC05_mcu_model → Set.P MC68HC05J5A → Πh:HC05_mcu_model.P h ≝
39 λP:HC05_mcu_model → Set.λp:P MC68HC05J5A.λh:HC05_mcu_model.
40 match h with [ MC68HC05J5A ⇒ p ].
42 ndefinition HC05_mcu_model_rect : ΠP:HC05_mcu_model → Type.P MC68HC05J5A → Πh:HC05_mcu_model.P h ≝
43 λP:HC05_mcu_model → Type.λp:P MC68HC05J5A.λh:HC05_mcu_model.
44 match h with [ MC68HC05J5A ⇒ p ].
47 ninductive HC08_mcu_model : Type ≝
48 MC68HC08AB16A: HC08_mcu_model
51 ndefinition HC08_mcu_model_ind : ΠP:HC08_mcu_model → Prop.P MC68HC08AB16A → Πh:HC08_mcu_model.P h ≝
52 λP:HC08_mcu_model → Prop.λp:P MC68HC08AB16A.λh:HC08_mcu_model.
53 match h with [ MC68HC08AB16A ⇒ p ].
55 ndefinition HC08_mcu_model_rec : ΠP:HC08_mcu_model → Set.P MC68HC08AB16A → Πh:HC08_mcu_model.P h ≝
56 λP:HC08_mcu_model → Set.λp:P MC68HC08AB16A.λh:HC08_mcu_model.
57 match h with [ MC68HC08AB16A ⇒ p ].
59 ndefinition HC08_mcu_model_rect : ΠP:HC08_mcu_model → Type.P MC68HC08AB16A → Πh:HC08_mcu_model.P h ≝
60 λP:HC08_mcu_model → Type.λp:P MC68HC08AB16A.λh:HC08_mcu_model.
61 match h with [ MC68HC08AB16A ⇒ p ].
63 (* modelli di HCS08 *)
64 ninductive HCS08_mcu_model : Type ≝
65 MC9S08GB60 : HCS08_mcu_model
68 ndefinition HCS08_mcu_model_ind : ΠP:HCS08_mcu_model → Prop.P MC9S08GB60 → Πh:HCS08_mcu_model.P h ≝
69 λP:HCS08_mcu_model → Prop.λp:P MC9S08GB60.λh:HCS08_mcu_model.
70 match h with [ MC9S08GB60 ⇒ p ].
72 ndefinition HCS08_mcu_model_rec : ΠP:HCS08_mcu_model → Set.P MC9S08GB60 → Πh:HCS08_mcu_model.P h ≝
73 λP:HCS08_mcu_model → Set.λp:P MC9S08GB60.λh:HCS08_mcu_model.
74 match h with [ MC9S08GB60 ⇒ p ].
76 ndefinition HCS08_mcu_model_rect : ΠP:HCS08_mcu_model → Type.P MC9S08GB60 → Πh:HCS08_mcu_model.P h ≝
77 λP:HCS08_mcu_model → Type.λp:P MC9S08GB60.λh:HCS08_mcu_model.
78 match h with [ MC9S08GB60 ⇒ p ].
81 ninductive RS08_mcu_model : Type ≝
82 MC9RS08KA1 : RS08_mcu_model
83 | MC9RS08KA2 : RS08_mcu_model.
85 ndefinition RS08_mcu_model_ind : ΠP:RS08_mcu_model → Prop.P MC9RS08KA1 → P MC9RS08KA2 → Πr:RS08_mcu_model.P r ≝
86 λP:RS08_mcu_model → Prop.λp:P MC9RS08KA1.λp1:P MC9RS08KA2.λr:RS08_mcu_model.
87 match r with [ MC9RS08KA1 ⇒ p | MC9RS08KA2 ⇒ p1 ].
89 ndefinition RS08_mcu_model_rec : ΠP:RS08_mcu_model → Set.P MC9RS08KA1 → P MC9RS08KA2 → Πr:RS08_mcu_model.P r ≝
90 λP:RS08_mcu_model → Set.λp:P MC9RS08KA1.λp1:P MC9RS08KA2.λr:RS08_mcu_model.
91 match r with [ MC9RS08KA1 ⇒ p | MC9RS08KA2 ⇒ p1 ].
93 ndefinition RS08_mcu_model_rect : ΠP:RS08_mcu_model → Type.P MC9RS08KA1 → P MC9RS08KA2 → Πr:RS08_mcu_model.P r ≝
94 λP:RS08_mcu_model → Type.λp:P MC9RS08KA1.λp1:P MC9RS08KA2.λr:RS08_mcu_model.
95 match r with [ MC9RS08KA1 ⇒ p | MC9RS08KA2 ⇒ p1 ].
97 (* raggruppamento dei modelli *)
98 ninductive any_mcu_model : Type ≝
99 FamilyHC05 : HC05_mcu_model → any_mcu_model
100 | FamilyHC08 : HC08_mcu_model → any_mcu_model
101 | FamilyHCS08 : HCS08_mcu_model → any_mcu_model
102 | FamilyRS08 : RS08_mcu_model → any_mcu_model.
104 ndefinition any_mcu_model_ind
105 : ΠP:any_mcu_model → Prop.(Πn:HC05_mcu_model.P (FamilyHC05 n)) → (Πn:HC08_mcu_model.P (FamilyHC08 n)) →
106 (Πn:HCS08_mcu_model.P (FamilyHCS08 n)) → (Πn:RS08_mcu_model.P (FamilyRS08 n))→Πa:any_mcu_model.P a ≝
107 λP:any_mcu_model → Prop.λf:Πn:HC05_mcu_model.P (FamilyHC05 n).λf1:Πn:HC08_mcu_model.P (FamilyHC08 n).
108 λf2:Πn:HCS08_mcu_model.P (FamilyHCS08 n).λf3:Πn:RS08_mcu_model.P (FamilyRS08 n).λa:any_mcu_model.
109 match a with [ FamilyHC05 n ⇒ f n | FamilyHC08 n ⇒ f1 n
110 | FamilyHCS08 n ⇒ f2 n | FamilyRS08 n ⇒ f3 n ].
112 ndefinition any_mcu_model_rec
113 : ΠP:any_mcu_model → Set.(Πn:HC05_mcu_model.P (FamilyHC05 n)) → (Πn:HC08_mcu_model.P (FamilyHC08 n)) →
114 (Πn:HCS08_mcu_model.P (FamilyHCS08 n)) → (Πn:RS08_mcu_model.P (FamilyRS08 n))→Πa:any_mcu_model.P a ≝
115 λP:any_mcu_model → Set.λf:Πn:HC05_mcu_model.P (FamilyHC05 n).λf1:Πn:HC08_mcu_model.P (FamilyHC08 n).
116 λf2:Πn:HCS08_mcu_model.P (FamilyHCS08 n).λf3:Πn:RS08_mcu_model.P (FamilyRS08 n).λa:any_mcu_model.
117 match a with [ FamilyHC05 n ⇒ f n | FamilyHC08 n ⇒ f1 n
118 | FamilyHCS08 n ⇒ f2 n | FamilyRS08 n ⇒ f3 n ].
120 ndefinition any_mcu_model_rect
121 : ΠP:any_mcu_model → Type.(Πn:HC05_mcu_model.P (FamilyHC05 n)) → (Πn:HC08_mcu_model.P (FamilyHC08 n)) →
122 (Πn:HCS08_mcu_model.P (FamilyHCS08 n)) → (Πn:RS08_mcu_model.P (FamilyRS08 n))→Πa:any_mcu_model.P a ≝
123 λP:any_mcu_model → Type.λf:Πn:HC05_mcu_model.P (FamilyHC05 n).λf1:Πn:HC08_mcu_model.P (FamilyHC08 n).
124 λf2:Πn:HCS08_mcu_model.P (FamilyHCS08 n).λf3:Πn:RS08_mcu_model.P (FamilyRS08 n).λa:any_mcu_model.
125 match a with [ FamilyHC05 n ⇒ f n | FamilyHC08 n ⇒ f1 n
126 | FamilyHCS08 n ⇒ f2 n | FamilyRS08 n ⇒ f3 n ].
129 condizioni errore interne alla MCU
130 (Il programma viene caricato dal produttore in ROM o impostato in EEPROM)
131 HC05: +illegal address during opcode fetch
132 HC08: +illegal address duting opcode fetch (ILAD mascherabile)
133 +illegal opcode (ILOP mascherabile)
135 (Il programma viene programmato nella FLASH)
136 HCS08: +illegal address during opcode fetch (ILAD mascherabile)
137 +illegal opcode (ILOP mascherabile)
138 +security = accesso a RAM e zone FLASH dichiarate sicure da zone sicure
139 da' 0 in lettura e ignore in scrittura, [FLASH]SEC00:SEC01 (1,0)
140 corrisponde a OFF, altre ON, disattivabile solo da modalita' sicura se
141 opzione [FLASH]KEYEN e' 1 passando chiave a 8byte da modalita' sicura.
142 Altrimenti disattivabile solo con FLASH mass erase. Obbiettivo
143 e' impedire duplicazione di software di controllo, dato che esiste
144 modalita' debugging. A restart viene ricaricata da FLASH impostazione
146 RS08: +illegal address durting opcode fetch (ILAD) mascherabile
147 +illegal opcode (ILOP mascherabile)
148 +security = solo la FLASH e' considerata sicura. Stesso meccanismo di HCS08
149 ma governato solo da [FLASH]SECD (0) OFF.Una volta attivato l'unica
150 disattivazione e' la cancellazione della FLASH.
153 (* memoria degli HC05 *)
154 ndefinition memory_type_of_FamilyHC05 ≝
155 λm:HC05_mcu_model.match m with
159 (* 0x0000-0x001F,0x0FF0: sarebbe memory mapped IO *)
161 triple ??? 〈〈x0,x0〉:〈x8,x0〉〉 〈〈x0,x0〉:〈xF,xF〉〉 MEM_READ_WRITE (* 128B RAM+STACK *)
162 ; triple ??? 〈〈x0,x3〉:〈x0,x0〉〉 〈〈x0,xC〉:〈xF,xF〉〉 MEM_READ_ONLY (* 2560B USER ROM *)
163 ; triple ??? 〈〈x0,xE〉:〈x0,x0〉〉 〈〈x0,xF〉:〈xF,xF〉〉 MEM_READ_ONLY (* 512B INTERNAL ROM *)
168 (* memoria degli HC08 *)
169 ndefinition memory_type_of_FamilyHC08 ≝
170 λm:HC08_mcu_model.match m with
174 (* 0x0000-0x004F,0xFE00-0xFE01,0xFE03,
175 0xFE0C-0xFE11,0xFE1A-0xFE1D,0xFE1F: sarebbe memory mapped IO *)
176 (* 0x0500-0x057F,0xFE02,0xFE04-0xFE07,
177 0xFE09-0xFE0B,0xFE12-0xFE19,0xFE1E,0xFFC0-0xFFCF : sarebbe reserved *)
179 triple ??? 〈〈x0,x0〉:〈x5,x0〉〉 〈〈x0,x2〉:〈x4,xF〉〉 MEM_READ_WRITE (* 512B RAM *)
180 ; triple ??? 〈〈x0,x8〉:〈x0,x0〉〉 〈〈x0,x9〉:〈xF,xF〉〉 MEM_READ_ONLY (* 512B EEPROM *)
181 ; triple ??? 〈〈xB,xE〉:〈x0,x0〉〉 〈〈xF,xD〉:〈xF,xF〉〉 MEM_READ_ONLY (* 16384B ROM *)
182 ; triple ??? 〈〈xF,xE〉:〈x2,x0〉〉 〈〈xF,xF〉:〈x5,x2〉〉 MEM_READ_ONLY (* 307B ROM *)
183 ; triple ??? 〈〈xF,xF〉:〈xD,x0〉〉 〈〈xF,xF〉:〈xF,xF〉〉 MEM_READ_ONLY (* 48B ROM *) ]
187 (* memoria degli HCS08 *)
188 ndefinition memory_type_of_FamilyHCS08 ≝
189 λm:HCS08_mcu_model.match m with
193 (* 0x0000-0x006F,0x1800-0x185F: sarebbe memory mapped IO *)
195 triple ??? 〈〈x0,x0〉:〈x8,x0〉〉 〈〈x1,x0〉:〈x7,xF〉〉 MEM_READ_WRITE (* 4096B RAM *)
196 ; triple ??? 〈〈x1,x0〉:〈x8,x0〉〉 〈〈x1,x7〉:〈xF,xF〉〉 MEM_READ_ONLY (* 1920B FLASH *)
197 ; triple ??? 〈〈x1,x8〉:〈x2,xC〉〉 〈〈xF,xF〉:〈xF,xF〉〉 MEM_READ_ONLY (* 59348B FLASH *) ]
200 (* memoria dei RS08 *)
201 ndefinition memory_type_of_FamilyRS08 ≝
202 λm:RS08_mcu_model.match m with
205 triple ??? 〈〈x0,x0〉:〈x0,x0〉〉 〈〈x0,x0〉:〈x0,xE〉〉 MEM_READ_WRITE (* 15B RAM *)
206 (* [000F] e' il registro X *)
207 (* 0x0010-0x001E sarebbe memory mapped IO, proviamo per completezza con RAM *)
208 ; triple ??? 〈〈x0,x0〉:〈x1,x0〉〉 〈〈x0,x0〉:〈x1,xE〉〉 MEM_READ_WRITE (* 15B MEMORY MAPPED IO *)
209 (* [001F] e' il registro PAGESEL *)
210 ; triple ??? 〈〈x0,x0〉:〈x2,x0〉〉 〈〈x0,x0〉:〈x4,xF〉〉 MEM_READ_WRITE (* 48B RAM *)
211 (* [00C0-00FF] mappato da PAGESEL su [00pp pppp ppxx xxxx] *)
212 ; triple ??? 〈〈x0,x0〉:〈xC,x0〉〉 〈〈x0,x0〉:〈xF,xF〉〉 MEM_READ_WRITE (* 64B RAM PAGING *)
213 (* 0x0200-0x023F sarebbe memory mapped IO, proviamo per completezza con RAM *)
214 ; triple ??? 〈〈x0,x2〉:〈x0,x0〉〉 〈〈x0,x2〉:〈x3,xF〉〉 MEM_READ_WRITE (* 64B MEMORY MAPPED IO *)
215 ; triple ??? 〈〈x3,xC〉:〈x0,x0〉〉 〈〈x3,xF〉:〈xF,xF〉〉 MEM_READ_ONLY (* 1024B FLASH *) ]
218 triple ??? 〈〈x0,x0〉:〈x0,x0〉〉 〈〈x0,x0〉:〈x0,xE〉〉 MEM_READ_WRITE (* 15B RAM *)
219 (* [000F] e' il registro X *)
220 (* 0x0010-0x001E sarebbe memory mapped IO, proviamo per completezza con RAM *)
221 ; triple ??? 〈〈x0,x0〉:〈x1,x0〉〉 〈〈x0,x0〉:〈x1,xE〉〉 MEM_READ_WRITE (* 15B MEMORY MAPPED IO *)
222 (* [001F] e' il registro PAGESEL *)
223 ; triple ??? 〈〈x0,x0〉:〈x2,x0〉〉 〈〈x0,x0〉:〈x4,xF〉〉 MEM_READ_WRITE (* 48B RAM *)
224 (* [00C0-00FF] mappato da PAGESEL su [00pp pppp ppxx xxxx] *)
225 ; triple ??? 〈〈x0,x0〉:〈xC,x0〉〉 〈〈x0,x0〉:〈xF,xF〉〉 MEM_READ_WRITE (* 64B RAM PAGING *)
226 (* 0x0200-0x023F sarebbe memory mapped IO, proviamo per completezza con RAM *)
227 ; triple ??? 〈〈x0,x2〉:〈x0,x0〉〉 〈〈x0,x2〉:〈x3,xF〉〉 MEM_READ_WRITE (* 64B MEMORY MAPPED IO *)
228 ; triple ??? 〈〈x3,x8〉:〈x0,x0〉〉 〈〈x3,xF〉:〈xF,xF〉〉 MEM_READ_ONLY (* 2048B FLASH *) ]
231 (* ∀modello.descrizione della memoria installata *)
232 ndefinition memory_type_of_mcu_version ≝
233 λmcu:any_mcu_model.match mcu with
234 [ FamilyHC05 m ⇒ memory_type_of_FamilyHC05 m
235 | FamilyHC08 m ⇒ memory_type_of_FamilyHC08 m
236 | FamilyHCS08 m ⇒ memory_type_of_FamilyHCS08 m
237 | FamilyRS08 m ⇒ memory_type_of_FamilyRS08 m
240 (* dato un modello costruisce un descrittore a partire dalla lista precedente *)
241 nlet rec build_memory_type_of_mcu_version_aux t param (result:aux_chk_type t) on param ≝
245 build_memory_type_of_mcu_version_aux t tl
246 (check_update_ranged t result (fst3T ??? hd) (snd3T ??? hd) (thd3T ??? hd)) ].
248 ndefinition build_memory_type_of_mcu_version ≝
249 λmcu:any_mcu_model.λt:memory_impl.
250 build_memory_type_of_mcu_version_aux t (memory_type_of_mcu_version mcu) (out_of_bound_memory t).
252 (* sarebbe programma da caricare/zero_memory, ora test *)
253 ndefinition memory_of_mcu_version ≝
254 λmcu:any_mcu_model.λt:memory_impl.match mcu with
255 [ FamilyHC05 m ⇒ match m with
256 [ MC68HC05J5A ⇒ zero_memory t
259 | FamilyHC08 m ⇒ match m with
260 [ MC68HC08AB16A ⇒ zero_memory t
263 (* tralascio l'enumerazione dei casi, per ora e' tutto 0 *)
264 | FamilyHCS08 _ ⇒ zero_memory t
265 | FamilyRS08 _ ⇒ zero_memory t
269 parametrizzati i non deterministici rispetto a tutti i valori casuali
270 che verranno dati dall'esterno di tipo byte8 (ndby1-2) e bool (ndbo1-5).
271 l'ACCENSIONE e' totalmente equivalente ad un reset causato da calo di tensione
272 (reset V-low), la memoria ed il check puo' essere passata, per esempio da
273 - (memory_of_mcu_version MC68HC05J5A)
274 - (build_memory_type_of_mcu_version MC68HC05J5A)
276 ndefinition start_of_mcu_version_HC05 ≝
277 λmcu:HC05_mcu_model.λt:memory_impl.
278 λmem:aux_mem_type t.λchk:aux_chk_type t.
279 λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
280 let build ≝ λspm,spf,pcm:word16.
281 let fetched_pc ≝ mk_word16 (mem_read_abs t mem (and_w16 〈〈xF,xF〉:〈xF,xE〉〉 pcm))
282 (mem_read_abs t mem (and_w16 〈〈xF,xF〉:〈xF,xF〉〉 pcm)) in
285 (* acc_low: ? *) ndby1 (* indx_low: ? *) ndby2
286 (* sp: reset *) (or_w16 (and_w16 〈〈x0,x0〉:〈xF,xF〉〉 spm) spf) spm spf
287 (* pc: reset+fetch *) (and_w16 fetched_pc pcm) pcm
288 (* H: ? *) ndbo1 (* I: reset *) true (* N: ? *) ndbo2
289 (* Z: ? *) ndbo3 (* C: ? *) ndbo4 (* IRQ: ? *) irqfl)
292 (* clk: reset *) (None ?) in
294 [ MC68HC05J5A ⇒ build 〈〈x0,x0〉:〈x3,xF〉〉 〈〈x0,x0〉:〈xC,x0〉〉 〈〈x0,xF〉:〈xF,xF〉〉
298 ndefinition start_of_mcu_version_HC08 ≝
299 λmcu:HC08_mcu_model.λt:memory_impl.
300 λmem:aux_mem_type t.λchk:aux_chk_type t.
301 λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
302 let fetched_pc ≝ mk_word16 (mem_read_abs t mem 〈〈xF,xF〉:〈xF,xE〉〉)
303 (mem_read_abs t mem 〈〈xF,xF〉:〈xF,xF〉〉) in
306 (* acc_low: ? *) ndby1 (* indw_low: ? *) ndby2 (* indx_high: reset *) 〈x0,x0〉
307 (* sp: reset *) 〈〈x0,x0〉:〈xF,xF〉〉 (* pc: reset+fetch *) fetched_pc
308 (* V: ? *) ndbo1 (* H: ? *) ndbo2 (* I: reset *) true
309 (* N: ? *) ndbo3 (* Z: ? *) ndbo4 (* C: ? *) ndbo5 (* IRQ: ? *) irqfl)
312 (* clk: reset *) (None ?).
314 ndefinition start_of_mcu_version_HCS08 ≝
315 λmcu:HCS08_mcu_model.λt:memory_impl.
316 λmem:aux_mem_type t.λchk:aux_chk_type t.
317 λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
318 let fetched_pc ≝ mk_word16 (mem_read_abs t mem 〈〈xF,xF〉:〈xF,xE〉〉)
319 (mem_read_abs t mem 〈〈xF,xF〉:〈xF,xF〉〉) in
320 mk_any_status HCS08 t
322 (* acc_low: ? *) ndby1 (* indw_low: ? *) ndby2 (* indx_high: reset *) 〈x0,x0〉
323 (* sp: reset *) 〈〈x0,x0〉:〈xF,xF〉〉 (* pc: reset+fetch *) fetched_pc
324 (* V: ? *) ndbo1 (* H: ? *) ndbo2 (* I: reset *) true
325 (* N: ? *) ndbo3 (* Z: ? *) ndbo4 (* C: ? *) ndbo5 (* IRQ: ? *) irqfl)
328 (* clk: reset *) (None ?).
330 ndefinition start_of_mcu_version_RS08 ≝
331 λmcu:RS08_mcu_model.λt:memory_impl.
332 λmem:aux_mem_type t.λchk:aux_chk_type t.
333 λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
337 (* acc_low: reset *) 〈x0,x0〉
338 (* pc: reset *) (and_w16 〈〈xF,xF〉:〈xF,xD〉〉 pcm) pcm
339 (* spc: reset *) (and_w16 〈〈xF,xF〉:〈xF,xD〉〉 pcm)
340 (* xm: reset *) 〈x0,x0〉 (* psm: *) 〈x8,x0〉
341 (* Z: reset *) false (* C: reset *) false)
344 (* clk: reset *) (None ?) in
345 (* tralascio l'enumerazione dei casi, tanto i valori sono uguali *)
346 build 〈〈x3,xF〉:〈xF,xF〉〉.
349 cio' che non viene resettato mantiene il valore precedente: nella documentazione
350 viene riportato come "unaffected"/"indeterminate"/"unpredictable"
351 il soft RESET e' diverso da un calo di tensione e la ram non variera'
353 ndefinition reset_of_mcu ≝
354 λm:mcu_type.λt:memory_impl.
355 let pc_reset_h ≝ 〈〈xF,xF〉:〈xF,xE〉〉 in
356 let pc_reset_l ≝ 〈〈xF,xF〉:〈xF,xF〉〉 in
357 let pc_RS08_reset ≝ 〈〈xF,xF〉:〈xF,xD〉〉 in
358 let sp_reset ≝ 〈〈x0,x0〉:〈xF,xF〉〉 in
359 match m return λm:mcu_type.(any_status m t) → (any_status m t) with
360 (* HC05: parzialmente non deterministico *)
361 [ HC05 ⇒ λs:any_status HC05 t.match s with
362 [ mk_any_status alu mem chk clk ⇒ match alu with
363 [ mk_alu_HC05 acclow indxlow _ spm spf _ pcm hfl _ nfl zfl cfl irqfl ⇒
364 let fetched_pc ≝ mk_word16 (mem_read_abs t mem (and_w16 pc_reset_h pcm))
365 (mem_read_abs t mem (and_w16 pc_reset_l pcm)) in
368 (* acc_low: inv. *) acclow (* indx_low: inv. *) indxlow
369 (* sp: reset *) (or_w16 (and_w16 sp_reset spm) spf) spm spf
370 (* pc: reset+fetch *) (and_w16 fetched_pc pcm) pcm
371 (* H: inv. *) hfl (* I: reset *) true (* N: inv. *) nfl
372 (* Z: inv. *) zfl (* C: inv. *) cfl (* IRQ: inv *) irqfl)
375 (* clk: reset *) (None ?) ]]
376 (* HC08: parzialmente non deterministico *)
377 | HC08 ⇒ λs:any_status HC08 t.match s with
378 [ mk_any_status alu mem chk clk ⇒ match alu with
379 [ mk_alu_HC08 acclow indxlow _ _ _ vfl hfl _ nfl zfl cfl irqfl ⇒
380 let fetched_pc ≝ mk_word16 (mem_read_abs t mem pc_reset_h)
381 (mem_read_abs t mem pc_reset_l) in
384 (* acc_low: inv. *) acclow (* indx_low: inv. *) indxlow (* indx_high: reset *) 〈x0,x0〉
385 (* sp: reset *) sp_reset (* pc: reset+fetch *) fetched_pc
386 (* V: inv. *) vfl (* H: inv. *) hfl (* I: reset *) true
387 (* N: inv. *) nfl (* Z: inv. *) zfl (* C: inv. *) cfl (* IRQ: inv *) irqfl)
390 (* clk: reset *) (None ?) ]]
391 (* HCS08: parzialmente non deterministico *)
392 | HCS08 ⇒ λs:any_status HCS08 t.match s with
393 [ mk_any_status alu mem chk clk ⇒ match alu with
394 [ mk_alu_HC08 acclow indxlow _ _ _ vfl hfl _ nfl zfl cfl irqfl ⇒
395 let fetched_pc ≝ mk_word16 (mem_read_abs t mem pc_reset_h)
396 (mem_read_abs t mem pc_reset_l) in
397 mk_any_status HCS08 t
399 (* acc_low: inv. *) acclow (* indx_low: inv. *) indxlow (* indx_high: reset *) 〈x0,x0〉
400 (* sp: reset *) sp_reset (* pc: reset+fetch *) fetched_pc
401 (* V: inv. *) vfl (* H: inv. *) hfl (* I: reset *) true
402 (* N: inv. *) nfl (* Z: inv. *) zfl (* C: inv. *) cfl (* IRQ: inv *) irqfl)
405 (* clk: reset *) (None ?) ]]
406 (* RS08: deterministico *)
407 | RS08 ⇒ λs:any_status RS08 t.match s with
408 [ mk_any_status alu mem chk clk ⇒ match alu with
409 [ mk_alu_RS08 _ _ pcm _ _ _ _ _ ⇒
412 (* acc_low: reset *) 〈x0,x0〉
413 (* pc: reset *) (and_w16 pc_RS08_reset pcm) pcm
414 (* spc: reset *) (and_w16 pc_RS08_reset pcm)
415 (* xm: reset *) 〈x0,x0〉 (* psm: reset *) 〈x8,x0〉
416 (* Z: reset *) false (* C: reset *) false)
419 (* clk: reset *) (None ?) ]]