1 (**************************************************************************)
4 (* ||A|| A project by Andrea Asperti *)
6 (* ||I|| Developers: *)
7 (* ||T|| The HELM team. *)
8 (* ||A|| http://helm.cs.unibo.it *)
10 (* \ / This file is distributed under the terms of the *)
11 (* v GNU General Public License Version 2 *)
13 (**************************************************************************)
15 (* ********************************************************************** *)
16 (* Progetto FreeScale *)
18 (* Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it *)
19 (* Ultima modifica: 05/08/2009 *)
21 (* ********************************************************************** *)
23 include "freescale_tests/micro_tests_tools.ma".
24 include "freescale/multivm.ma".
25 include "freescale/status_lemmas.ma".
27 (* ****************************************** *)
28 (* MICRO TEST DI CORRETTEZZA DELLE ISTRUZIONI *)
29 (* ****************************************** *)
31 (* **************** *)
32 (* HCS08 CBEQx/DBNZ *)
33 (* **************** *)
35 ndefinition mTest_HCS08_CBEQ_DBNZ_source ≝ let m ≝ HCS08 in source_to_byte8 m (
36 (* testa la logica di CBEQx/DBNZ e le modalita' xxx_and_IMM1 *)
37 (* BEFORE: H:X=0x006F SP=0x006F PC=0x1860 *)
38 (* [0x1860] 5clk *) (compile m ? CBEQA (maDIR1_and_IMM1 〈x7,x1〉 〈x0,x1〉) I) @
39 (* [0x1863] 1clk *) (compile m ? NOP maINH I) @ (* eseguito: A≠[0x0071]=0x01 *)
40 (* [0x1864] 4clk *) (compile m ? CBEQA (maIMM1_and_IMM1 〈x0,x0〉 〈x0,x1〉) I) @
41 (* [0x1867] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: A=0x00 *)
42 (* [0x1868] 4clk *) (compile m ? CBEQX (maIMM1_and_IMM1 〈x6,xF〉 〈x0,x1〉) I) @
43 (* [0x186B] 1clk *) (compile m ? NOP maINH I) (* non eseguito: X=0x6F *)
44 (* [0x186C] si puo' quindi enunciare che dopo 5+1+4+4 =14 *)
45 (* PC<-0x186C H:X<-006F *)
48 (* creazione del processore+caricamento+impostazione registri *)
49 ndefinition mTest_HCS08_CBEQ_DBNZ_status ≝
52 setweak_sp_reg HCS08 t (* SP<-0x006F *)
53 (setweak_indX_16_reg HCS08 t (* H:X<-0x006F *)
54 (set_pc_reg HCS08 t (* PC<-mTest_HCS08_prog *)
55 (start_of_mcu_version_HCS08
57 (load_from_source_at t (* carica b1-3 in RAM:mTest_HCS08_RAM *)
58 (load_from_source_at t (* carica mTest_bytes in RAM:mTest_HCS08_RAM *)
59 (load_from_source_at t (zero_memory t) (* carica source in ROM:mTest_HCS08_prog *)
60 mTest_HCS08_CBEQ_DBNZ_source mTest_HCS08_prog)
61 mTest_bytes mTest_HCS08_RAM)
62 [ b1 ; b2 ; b3 ] mTest_HCS08_RAM)
63 (build_memory_type_of_mcu_version (FamilyHCS08 MC9S08AW60) t)
64 (mk_byte8 x0 x0) (mk_byte8 x0 x0) (* non deterministici tutti a 0 *)
65 false false false false false false) (* non deterministici tutti a 0 *)
67 (mk_word16 (mk_byte8 x0 x0) (mk_byte8 x6 xF)))
68 (mk_word16 (mk_byte8 x0 x0) (mk_byte8 x6 xF)).
70 (* dimostrazione senza svolgimento degli stati, immediata *)
71 (* NB: la memoria e' cambiata e bisogna applicare eq_status *)
72 nlemma ok_mTest_HCS08_CBEQ_DBNZ_full :
75 (match execute HCS08 t (TickOK ? (mTest_HCS08_CBEQ_DBNZ_status t 〈x0,x0〉 〈x0,x1〉 〈x0,x2〉)) nat14
76 with [ TickERR s _ ⇒ s | TickSUSP s _ ⇒ s | TickOK s ⇒ s ])
77 (set_pc_reg HCS08 t (* nuovo PC *)
78 (mTest_HCS08_CBEQ_DBNZ_status t 〈x0,x0〉 〈x0,x1〉 〈x0,x2〉) (* nuovo H:X *)
79 (mk_word16 〈x1,x8〉 〈x6,xC〉))
83 (* nelim t; napply refl_eq; nqed. *)
84 (* cosi' in 3sec fa tutto *)
86 napply (eq_to_eqanystatus_weak [] HCS08 t …);