2 (** This module defines the operators and branch conditions of the
5 (* Pasted from Pottier's PP compiler *)
7 (* These type definitions document the target processor's operators
8 and branch conditions. Here, the target processor is the MIPS. *)
10 (* The MIPS manual explains that some instructions are actual machine
11 instructions, while others are pseudo-instructions, which are
12 expanded away by the assembler. Do we need to be aware of the
15 Ignoring the distinction is interesting. There are several
16 processors in the MIPS family, and the distinction between actual
17 instructions and pseudo-instructions might vary with the
18 processor. For instance, a future member of the MIPS family might
19 implement more instructions in hardware than its predecessors.
21 On the other hand, ignoring the distinction means that we cannot
22 use the hardware register [$at], which is reserved by the assembler
23 for translating some pseudo-instructions into actual instructions.
25 Our approach is to follow standard practice and to exploit
26 pseudo-instructions when desired. This means that we cannot use
29 (* Immediate constants, used in the definition of some operators. They
30 must fit in 16 bits. *)
35 (* Offsets, used as part of addressing modes. They are measured in
36 bytes and must fit in 16 bits. *)
41 (* Unary (integer arithmetic) operators. *)
44 | UOpAddi of immediate16
45 | UOpSlti of immediate16 (* set on less than immediate *)
46 | UOpSltiu of immediate16
47 | UOpAndi of immediate16
48 | UOpOri of immediate16
49 | UOpXori of immediate16
53 (* Binary (integer arithmetic or integer comparison) operators. Among
54 the comparison operators, only [OpLt] corresponds to a MIPS binary
55 comparison instruction, namely [slt]. All others correspond to
56 pseudo-instructions. They are exploited because they are
83 (* Unary branch conditions. *)
87 (* Greater than or equal to zero. *)
91 (* Greater than zero. *)
95 (* Less than or equal to zero. *)
103 (* Binary branch conditions. *)