open Preamble open Extra_bool open Coqlib open Values open FrontEndVal open GenMem open FrontEndMem open Globalenvs open String open Sets open Listb open LabelledObjects open BitVectorTrie open Graphs open I8051 open Order open Registers open CostLabel open Hide open Proper open PositiveMap open Deqsets open ErrorMessages open PreIdentifiers open Errors open Extralib open Lists open Identifiers open Integers open AST open Division open Exp open Arithmetic open Setoids open Monad open Option open Extranat open Vector open Div_and_mod open Jmeq open Russell open List open Util open FoldStuff open BitVector open Types open Bool open Relations open Nat open Hints_declaration open Core_notation open Pts open Logic open Positive open Z open BitVectorZ open Pointers open ByteValues open BackEndOps open Joint type rtl_seq = | Rtl_stack_address of Registers.register * Registers.register (** val rtl_seq_rect_Type4 : (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1 **) let rec rtl_seq_rect_Type4 h_rtl_stack_address = function | Rtl_stack_address (x_18151, x_18150) -> h_rtl_stack_address x_18151 x_18150 (** val rtl_seq_rect_Type5 : (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1 **) let rec rtl_seq_rect_Type5 h_rtl_stack_address = function | Rtl_stack_address (x_18155, x_18154) -> h_rtl_stack_address x_18155 x_18154 (** val rtl_seq_rect_Type3 : (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1 **) let rec rtl_seq_rect_Type3 h_rtl_stack_address = function | Rtl_stack_address (x_18159, x_18158) -> h_rtl_stack_address x_18159 x_18158 (** val rtl_seq_rect_Type2 : (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1 **) let rec rtl_seq_rect_Type2 h_rtl_stack_address = function | Rtl_stack_address (x_18163, x_18162) -> h_rtl_stack_address x_18163 x_18162 (** val rtl_seq_rect_Type1 : (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1 **) let rec rtl_seq_rect_Type1 h_rtl_stack_address = function | Rtl_stack_address (x_18167, x_18166) -> h_rtl_stack_address x_18167 x_18166 (** val rtl_seq_rect_Type0 : (Registers.register -> Registers.register -> 'a1) -> rtl_seq -> 'a1 **) let rec rtl_seq_rect_Type0 h_rtl_stack_address = function | Rtl_stack_address (x_18171, x_18170) -> h_rtl_stack_address x_18171 x_18170 (** val rtl_seq_inv_rect_Type4 : rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1 **) let rtl_seq_inv_rect_Type4 hterm h1 = let hcut = rtl_seq_rect_Type4 h1 hterm in hcut __ (** val rtl_seq_inv_rect_Type3 : rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1 **) let rtl_seq_inv_rect_Type3 hterm h1 = let hcut = rtl_seq_rect_Type3 h1 hterm in hcut __ (** val rtl_seq_inv_rect_Type2 : rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1 **) let rtl_seq_inv_rect_Type2 hterm h1 = let hcut = rtl_seq_rect_Type2 h1 hterm in hcut __ (** val rtl_seq_inv_rect_Type1 : rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1 **) let rtl_seq_inv_rect_Type1 hterm h1 = let hcut = rtl_seq_rect_Type1 h1 hterm in hcut __ (** val rtl_seq_inv_rect_Type0 : rtl_seq -> (Registers.register -> Registers.register -> __ -> 'a1) -> 'a1 **) let rtl_seq_inv_rect_Type0 hterm h1 = let hcut = rtl_seq_rect_Type0 h1 hterm in hcut __ (** val rtl_seq_discr : rtl_seq -> rtl_seq -> __ **) let rtl_seq_discr x y = Logic.eq_rect_Type2 x (let Rtl_stack_address (a0, a1) = x in Obj.magic (fun _ dH -> dH __ __)) y (** val rtl_seq_jmdiscr : rtl_seq -> rtl_seq -> __ **) let rtl_seq_jmdiscr x y = Logic.eq_rect_Type2 x (let Rtl_stack_address (a0, a1) = x in Obj.magic (fun _ dH -> dH __ __)) y (** val rTL_uns : Joint.unserialized_params **) let rTL_uns = { Joint.ext_seq_labels = (fun x -> List.Nil); Joint.has_tailcalls = Bool.False } (** val rTL_functs : Joint.get_pseudo_reg_functs **) let rTL_functs = { Joint.acc_a_regs = (fun r -> List.Cons ((Obj.magic r), List.Nil)); Joint.acc_b_regs = (fun r -> List.Cons ((Obj.magic r), List.Nil)); Joint.acc_a_args = (fun a -> match Obj.magic a with | Joint.Reg r -> List.Cons (r, List.Nil) | Joint.Imm x -> List.Nil); Joint.acc_b_args = (fun a -> match Obj.magic a with | Joint.Reg r -> List.Cons (r, List.Nil) | Joint.Imm x -> List.Nil); Joint.dpl_regs = (fun r -> List.Cons ((Obj.magic r), List.Nil)); Joint.dph_regs = (fun r -> List.Cons ((Obj.magic r), List.Nil)); Joint.dpl_args = (fun a -> match Obj.magic a with | Joint.Reg r -> List.Cons (r, List.Nil) | Joint.Imm x -> List.Nil); Joint.dph_args = (fun a -> match Obj.magic a with | Joint.Reg r -> List.Cons (r, List.Nil) | Joint.Imm x -> List.Nil); Joint.snd_args = (fun a -> match Obj.magic a with | Joint.Reg r -> List.Cons (r, List.Nil) | Joint.Imm x -> List.Nil); Joint.pair_move_regs = (fun x -> List.append (List.Cons ((Obj.magic x).Types.fst, List.Nil)) (match (Obj.magic x).Types.snd with | Joint.Reg r -> List.Cons (r, List.Nil) | Joint.Imm x0 -> List.Nil)); Joint.f_call_args = (fun l -> Util.foldl (fun l1 a -> List.append l1 (match a with | Joint.Reg r -> List.Cons (r, List.Nil) | Joint.Imm x -> List.Nil)) List.Nil (Obj.magic l)); Joint.f_call_dest = (fun x -> Obj.magic x); Joint.ext_seq_regs = (fun ext -> let Rtl_stack_address (r1, r2) = Obj.magic ext in List.Cons (r1, (List.Cons (r2, List.Nil)))); Joint.params_regs = (fun x -> Obj.magic x) } (** val rTL : Joint.graph_params **) let rTL = { Joint.u_pars = rTL_uns; Joint.functs = rTL_functs } type rtl_program = Joint.joint_program (** val dpi1__o__reg_to_rtl_snd_argument__o__inject : (Registers.register, 'a1) Types.dPair -> Joint.psd_argument Types.sig0 **) let dpi1__o__reg_to_rtl_snd_argument__o__inject x2 = Joint.psd_argument_from_reg x2.Types.dpi1 (** val eject__o__reg_to_rtl_snd_argument__o__inject : Registers.register Types.sig0 -> Joint.psd_argument Types.sig0 **) let eject__o__reg_to_rtl_snd_argument__o__inject x2 = Joint.psd_argument_from_reg (Types.pi1 x2) (** val reg_to_rtl_snd_argument__o__inject : Registers.register -> Joint.psd_argument Types.sig0 **) let reg_to_rtl_snd_argument__o__inject x1 = Joint.psd_argument_from_reg x1 (** val dpi1__o__reg_to_rtl_snd_argument : (Registers.register, 'a1) Types.dPair -> Joint.psd_argument **) let dpi1__o__reg_to_rtl_snd_argument x1 = Joint.psd_argument_from_reg x1.Types.dpi1 (** val eject__o__reg_to_rtl_snd_argument : Registers.register Types.sig0 -> Joint.psd_argument **) let eject__o__reg_to_rtl_snd_argument x1 = Joint.psd_argument_from_reg (Types.pi1 x1) (** val dpi1__o__byte_to_rtl_snd_argument__o__inject : (BitVector.byte, 'a1) Types.dPair -> Joint.psd_argument Types.sig0 **) let dpi1__o__byte_to_rtl_snd_argument__o__inject x2 = Joint.psd_argument_from_byte x2.Types.dpi1 (** val eject__o__byte_to_rtl_snd_argument__o__inject : BitVector.byte Types.sig0 -> Joint.psd_argument Types.sig0 **) let eject__o__byte_to_rtl_snd_argument__o__inject x2 = Joint.psd_argument_from_byte (Types.pi1 x2) (** val byte_to_rtl_snd_argument__o__inject : BitVector.byte -> Joint.psd_argument Types.sig0 **) let byte_to_rtl_snd_argument__o__inject x1 = Joint.psd_argument_from_byte x1 (** val dpi1__o__byte_to_rtl_snd_argument : (BitVector.byte, 'a1) Types.dPair -> Joint.psd_argument **) let dpi1__o__byte_to_rtl_snd_argument x1 = Joint.psd_argument_from_byte x1.Types.dpi1 (** val eject__o__byte_to_rtl_snd_argument : BitVector.byte Types.sig0 -> Joint.psd_argument **) let eject__o__byte_to_rtl_snd_argument x1 = Joint.psd_argument_from_byte (Types.pi1 x1) (** val rTL_premain : rtl_program -> Joint.joint_closed_internal_function **) let rTL_premain p = let l1 = Positive.One in let l2 = Positive.P0 Positive.One in let l3 = Positive.P1 Positive.One in let rs = List.Cons (Positive.One, (List.Cons ((Positive.P0 Positive.One), (List.Cons ((Positive.P1 Positive.One), (List.Cons ((Positive.P0 (Positive.P0 Positive.One)), List.Nil))))))) in let res = { Joint.joint_if_luniverse = (Positive.P0 (Positive.P0 Positive.One)); Joint.joint_if_runiverse = (Positive.P1 (Positive.P0 Positive.One)); Joint.joint_if_result = (Obj.magic List.Nil); Joint.joint_if_params = (Obj.magic rs); Joint.joint_if_stacksize = Nat.O; Joint.joint_if_local_stacksize = Nat.O; Joint.joint_if_code = (Obj.magic (Identifiers.empty_map PreIdentifiers.LabelTag)); Joint.joint_if_entry = (Obj.magic l1) } in let res0 = Joint.add_graph rTL (Joint.prog_names (Joint.graph_params_to_params rTL) p) l1 (Joint.Sequential ((Joint.COST_LABEL p.Joint.init_cost_label), (Obj.magic l2))) res in let res1 = Joint.add_graph rTL (Joint.prog_names (Joint.graph_params_to_params rTL) p) l2 (Joint.Sequential ((Joint.CALL ((Types.Inl p.Joint.joint_prog.AST.prog_main), (Obj.magic List.Nil), (Obj.magic rs))), (Obj.magic l3))) res0 in let res2 = Joint.add_graph rTL (Joint.prog_names (Joint.graph_params_to_params rTL) p) l3 (Joint.Final (Joint.GOTO l3)) res1 in res2