--- /dev/null
+(**************************************************************************)
+(* ___ *)
+(* ||M|| *)
+(* ||A|| A project by Andrea Asperti *)
+(* ||T|| *)
+(* ||I|| Developers: *)
+(* ||T|| The HELM team. *)
+(* ||A|| http://helm.cs.unibo.it *)
+(* \ / *)
+(* \ / This file is distributed under the terms of the *)
+(* v GNU General Public License Version 2 *)
+(* *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(* Progetto FreeScale *)
+(* *)
+(* Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it *)
+(* Sviluppo: 2008-2010 *)
+(* *)
+(* ********************************************************************** *)
+
+include "emulator/read_write/load_write_base.ma".
+include "emulator/status/status_getter.ma".
+
+(* lettura da [PC<<1 - 1] : argomento non caricato dal fetch word-aligned *)
+ndefinition mode_IMM1_load ≝
+λt:memory_impl.λs:any_status IP2022 t.
+ mem_read_s … s (rol_w32 〈〈〈x8,x1〉:〈x0,x0〉〉.(pred_w16 (get_pc_reg … s))〉).
+
+(* lettura da [ADDR] *)
+ndefinition mode_ADDR_load ≝
+λt:memory_impl.λs:any_status IP2022 t.
+ opt_map … (get_addr_reg … s)
+ (λaddr.match (eq_b8 (w24x addr) 〈x0,x1〉) ⊗ (le_w16 (pred_w16 (get_pc_reg … s)) 〈〈x1,xF〉:〈xF,xF〉〉) with
+ (* lettura della FLASH da codice in RAM : operazione non bloccante non implementata! *)
+ [ true ⇒ None ?
+ | false ⇒ opt_map … (memory_filter_read … s 〈〈〈x0,x2〉:(w24x addr)〉.〈(w24h addr):(w24l addr)〉〉)
+ (λbh.opt_map … (memory_filter_read … s 〈〈〈x0,x2〉:(w24x (succ_w24 addr))〉.〈(w24h (succ_w24 addr)):(w24l (succ_w24 addr))〉〉)
+ (λbl.Some ? 〈bh:bl〉))]).
+
+(* scrittura su [ADDR] *)
+ndefinition mode_ADDR_write ≝
+λt:memory_impl.λs:any_status IP2022 t.λval:word16.
+ opt_map … (get_addr_reg … s)
+ (λaddr.opt_map … (memory_filter_write … s 〈〈〈x0,x2〉:(w24x addr)〉.〈(w24h addr):(w24l addr)〉〉 auxMode_ok (cnH ? val))
+ (λs'.memory_filter_write … s' 〈〈〈x0,x2〉:(w24x (succ_w24 addr))〉.〈(w24h (succ_w24 addr)):(w24l (succ_w24 addr))〉〉 auxMode_ok (cnL ? val))).
+
+(* IMM1 > 0 : lettura/scrittura da [IMM1] *)
+(* else : lettura/scrittura da [IP] : IP ≥ 0x20 *)
+ndefinition mode_DIR1IP_aux ≝
+λt:memory_impl.λs:any_status IP2022 t.λT.λf:word32 → option T.
+ opt_map … (mode_IMM1_load t s)
+ (λaddr.match eq_b8 addr 〈x0,x0〉 with
+ (* xxxxxxx0 00000000 → [IP] *)
+ [ true ⇒ opt_map … (get_ip_reg … s)
+ (λip.match ge_w16 ip 〈〈x0,x0〉:〈x2,x0〉〉 with
+ (* IP ≥ 0x20 *)
+ [ true ⇒ f (extu_w32 ip)
+ | false ⇒ None ? ])
+ (* xxxxxxx0 nnnnnnnn → [IMM1] *)
+ | false ⇒ f (extu2_w32 addr)
+ ]).
+
+(* IMM1 < 0x80 : lettura/scrittura da [DP+IMM1] : DP+IMM1 ≥ 0x20 *)
+(* else : lettura/scrittura da [SP+IMM1] : SP+IMM1 ≥ 0x20 *)
+ndefinition mode_DPSP_aux ≝
+λt:memory_impl.λs:any_status IP2022 t.λT.λf:word32 → option T.
+ opt_map … (mode_IMM1_load t s)
+ (λaddr.opt_map … (match getMSB_b8 addr with
+ (* xxxxxxx1 1nnnnnnn → [SP+IMM1] *)
+ [ true ⇒ get_sp_reg … s
+ (* xxxxxxx1 0nnnnnnn → [DP+IMM1] *)
+ | false ⇒ get_dp_reg … s ])
+ (λreg.match ge_w16 (plus_w16_d_d reg (extu_w16 (clrMSB_b8 addr))) 〈〈x0,x0〉:〈x2,x0〉〉 with
+ (* reg+IMM1 ≥ 0x20 *)
+ [ true ⇒ f (extu_w32 (plus_w16_d_d reg (extu_w16 (clrMSB_b8 addr))))
+ | false ⇒ None ? ])).
+
+(* FR0 *)
+ndefinition mode_FR0_load ≝
+λt:memory_impl.λs:any_status IP2022 t.
+ mode_DIR1IP_aux t s byte8 (memory_filter_read … s).
+
+ndefinition mode_FR0n_load ≝
+λt:memory_impl.λs:any_status IP2022 t.λsub:oct.
+ mode_DIR1IP_aux t s bool (λaddr.memory_filter_read_bit … s addr sub).
+
+ndefinition mode_FR0_write ≝
+λt:memory_impl.λs:any_status IP2022 t.λflag:aux_mod_type.λval:byte8.
+ mode_DIR1IP_aux t s (any_status IP2022 t) (λaddr.memory_filter_write … s addr flag val).
+
+ndefinition mode_FR0n_write ≝
+λt:memory_impl.λs:any_status IP2022 t.λsub:oct.λval:bool.
+ mode_DIR1IP_aux t s (any_status IP2022 t) (λaddr.memory_filter_write_bit … s addr sub val).
+
+(* FR1 *)
+ndefinition mode_FR1_load ≝
+λt:memory_impl.λs:any_status IP2022 t.
+ mode_DPSP_aux t s byte8 (memory_filter_read … s).
+
+ndefinition mode_FR1n_load ≝
+λt:memory_impl.λs:any_status IP2022 t.λsub:oct.
+ mode_DPSP_aux t s bool (λaddr.memory_filter_read_bit … s addr sub).
+
+ndefinition mode_FR1_write ≝
+λt:memory_impl.λs:any_status IP2022 t.λflag:aux_mod_type.λval:byte8.
+ mode_DPSP_aux t s (any_status IP2022 t) (λaddr.memory_filter_write … s addr flag val).
+
+ndefinition mode_FR1n_write ≝
+λt:memory_impl.λs:any_status IP2022 t.λsub:oct.λval:bool.
+ mode_DPSP_aux t s (any_status IP2022 t) (λaddr.memory_filter_write_bit … s addr sub val).