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-(**************************************************************************)
-(*       ___                                                              *)
-(*      ||M||                                                             *)
-(*      ||A||       A project by Andrea Asperti                           *)
-(*      ||T||                                                             *)
-(*      ||I||       Developers:                                           *)
-(*      ||T||         The HELM team.                                      *)
-(*      ||A||         http://helm.cs.unibo.it                             *)
-(*      \   /                                                             *)
-(*       \ /        This file is distributed under the terms of the       *)
-(*        v         GNU General Public License Version 2                  *)
-(*                                                                        *)
-(**************************************************************************)
-
-(* ********************************************************************** *)
-(*                          Progetto FreeScale                            *)
-(*                                                                        *)
-(*   Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it              *)
-(*   Ultima modifica: 05/08/2009                                          *)
-(*                                                                        *)
-(* ********************************************************************** *)
-
-include "freescale_tests/micro_tests_tools.ma".
-include "freescale/multivm.ma".
-include "freescale/status_lemmas.ma".
-
-(* ****************************************** *)
-(* MICRO TEST DI CORRETTEZZA DELLE ISTRUZIONI *)
-(* ****************************************** *)
-
-(* ************* *)
-(* HCS08 ROL/ROR *)
-(* ************* *)
-
-ndefinition mTest_HCS08_ROL_ROR_source ≝ let m ≝ HCS08 in source_to_byte8 m (
-(* testa la logica di ROL/ROR e le modalita' IMM2,INHx *)
-(* BEFORE: A=0x00 H:X=0x0000 PC=0x1860 Z=true *)
-(* [0x1860] 3clk *) (compile m ? LDHX (maIMM2 〈〈x1,x2〉:〈x3,x4〉〉) I) @
-(* [0x1863] 2clk *) (compile m ? LDA (maIMM1 〈x5,x6〉) I) @
-(* [0x1865] 1clk *) (compile m ? ROL maINHA I) @
-(* [0x1866] 1clk *) (compile m ? ROL maINHX I) @
-(* [0x1867] 1clk *) (compile m ? ROR maINHA I) @
-(* [0x1868] 1clk *) (compile m ? ROR maINHX I) @
-(* [0x1869] 1clk *) (compile m ? CLR maINHA I) @
-(* [0x186A] 1clk *) (compile m ? CLR maINHX I) @
-(* [0x186B] 1clk *) (compile m ? CLR maINHH I)
-(* [0x186C] si puo' quindi enunciare che dopo 3+2+1+1+1+1+1+1+1=12 clk *)
-(*          PC<-0x186C *)
-).
-
-(* creazione del processore+caricamento+impostazione registri *)
-ndefinition mTest_HCS08_ROL_ROR_status ≝
-λt:memory_impl.
- set_z_flag HCS08 t (* Z<-true *)
-  (setweak_indX_16_reg HCS08 t (* H:X<-0x0000 *)
-   (set_pc_reg HCS08 t (* PC<-mTest_HCS08_prog *)
-    (start_of_mcu_version_HCS08
-     MC9S08AW60 t
-     (load_from_source_at t (zero_memory t) (* carica source in ROM:mTest_HCS08_prog *)
-      mTest_HCS08_ROL_ROR_source mTest_HCS08_prog)
-     (build_memory_type_of_mcu_version (FamilyHCS08 MC9S08AW60) t)
-     (mk_byte8 x0 x0) (mk_byte8 x0 x0) (* non deterministici tutti a 0 *)
-     false false false false false false) (* non deterministici tutti a 0 *)
-    mTest_HCS08_prog)
-   (mk_word16 (mk_byte8 x0 x0) (mk_byte8 x0 x0)))
-  true.
-
-(* dimostrazione senza svolgimento degli stati, immediata *)
-nlemma ok_mTest_HCS08_ROL_ROR_full :
- ∀t:memory_impl.
- execute HCS08 t (TickOK ? (mTest_HCS08_ROL_ROR_status t)) nat12 =
- TickOK ? (set_pc_reg HCS08 t (* nuovo PC *)
-           (mTest_HCS08_ROL_ROR_status t) (mk_word16 〈x1,x8〉 〈x6,xC〉)).
- #t; nelim t;
- napply refl_eq.
-nqed.