--- /dev/null
+(**************************************************************************)
+(* ___ *)
+(* ||M|| *)
+(* ||A|| A project by Andrea Asperti *)
+(* ||T|| *)
+(* ||I|| Developers: *)
+(* ||T|| The HELM team. *)
+(* ||A|| http://helm.cs.unibo.it *)
+(* \ / *)
+(* \ / This file is distributed under the terms of the *)
+(* v GNU General Public License Version 2 *)
+(* *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(* Progetto FreeScale *)
+(* *)
+(* Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it *)
+(* Ultima modifica: 05/08/2009 *)
+(* *)
+(* ********************************************************************** *)
+
+include "freescale_tests/micro_tests_tools.ma".
+include "freescale/multivm.ma".
+include "freescale/status_lemmas.ma".
+
+(* ****************************************** *)
+(* MICRO TEST DI CORRETTEZZA DELLE ISTRUZIONI *)
+(* ****************************************** *)
+
+(* **************** *)
+(* HCS08 CBEQx/DBNZ *)
+(* **************** *)
+
+ndefinition mTest_HCS08_CBEQ_DBNZ_source ≝ let m ≝ HCS08 in source_to_byte8 m (
+(* testa la logica di CBEQx/DBNZ e le modalita' xxx_and_IMM1 *)
+(* BEFORE: H:X=0x006F SP=0x006F PC=0x1860 *)
+(* [0x1860] 5clk *) (compile m ? CBEQA (maDIR1_and_IMM1 〈x7,x1〉 〈x0,x1〉) I) @
+(* [0x1863] 1clk *) (compile m ? NOP maINH I) @ (* eseguito: A≠[0x0071]=0x01 *)
+(* [0x1864] 4clk *) (compile m ? CBEQA (maIMM1_and_IMM1 〈x0,x0〉 〈x0,x1〉) I) @
+(* [0x1867] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: A=0x00 *)
+(* [0x1868] 4clk *) (compile m ? CBEQX (maIMM1_and_IMM1 〈x6,xF〉 〈x0,x1〉) I) @
+(* [0x186B] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: X=0x6F *)
+(* [0x186C] 5clk *) (compile m ? CBEQA (maIX1p_and_IMM1 〈x0,x1〉 〈x0,x1〉) I) @ (* H:X++ *)
+(* [0x186F] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: A=[X+0x01]=[0x0070]=0x00 *)
+(* [0x1870] 5clk *) (compile m ? CBEQA (maIX0p_and_IMM1 〈x0,x1〉) I) @ (* H:X++ *)
+(* [0x1872] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: A=[X]=[0x0070]=0x00 *)
+(* [0x1873] 6clk *) (compile m ? CBEQA (maSP1_and_IMM1 〈x0,x2〉 〈x0,x1〉) I) @
+(* [0x1877] 1clk *) (compile m ? NOP maINH I) @ (* eseguito: A≠[SP+0x02]=[0x0071]=0x01 *)
+
+(* [0x1878] 7clk *) (compile m ? DBNZ (maDIR1_and_IMM1 〈x7,x2〉 〈x0,x1〉) I) @
+(* [0x187B] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: --[0x0072]=0x01≠0 *)
+(* [0x187C] 4clk *) (compile m ? DBNZ (maINHA_and_IMM1 〈x0,x1〉) I) @
+(* [0x187E] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: --A=0xFF≠0 *)
+(* [0x187F] 4clk *) (compile m ? DBNZ (maINHX_and_IMM1 〈x0,x1〉) I) @
+(* [0x1881] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: --X=0x70≠0 *)
+(* [0x1882] 7clk *) (compile m ? DBNZ (maIX1_and_IMM1 〈x0,x2〉 〈x0,x1〉) I) @
+(* [0x1885] 1clk *) (compile m ? NOP maINH I) @ (* eseguito: --[X+0x02]=[0x0072]=0x00=0 *)
+(* [0x1886] 6clk *) (compile m ? DBNZ (maIX0_and_IMM1 〈x0,x1〉) I) @
+(* [0x1888] 1clk *) (compile m ? NOP maINH I) @ (* non eseguito: --[X]=[0x0070]=0xFF≠0 *)
+(* [0x1889] 8clk *) (compile m ? DBNZ (maSP1_and_IMM1 〈x0,x1〉 〈x0,x1〉) I) @
+(* [0x188D] 1clk *) (compile m ? NOP maINH I) (* non eseguito: --[SP+0x01]=[0x0070]=0xFE≠0 *)
+(* [0x188E] si puo' quindi enunciare che dopo 5+1+4+4+5+5+6+1 (31)
+ 7+4+4+7+1+6+8 (37) =68 clk *)
+(* A<-0xFF PC<-0x188E H:X<-0070 *)
+).
+
+(* creazione del processore+caricamento+impostazione registri *)
+ndefinition mTest_HCS08_CBEQ_DBNZ_status ≝
+λt:memory_impl.
+λb1,b2,b3:byte8.
+ setweak_sp_reg HCS08 t (* SP<-0x006F *)
+ (setweak_indX_16_reg HCS08 t (* H:X<-0x006F *)
+ (set_pc_reg HCS08 t (* PC<-mTest_HCS08_prog *)
+ (start_of_mcu_version_HCS08
+ MC9S08AW60 t
+ (load_from_source_at t (* carica b1-3 in RAM:mTest_HCS08_RAM *)
+ (load_from_source_at t (* carica mTest_bytes in RAM:mTest_HCS08_RAM *)
+ (load_from_source_at t (zero_memory t) (* carica source in ROM:mTest_HCS08_prog *)
+ mTest_HCS08_CBEQ_DBNZ_source mTest_HCS08_prog)
+ mTest_bytes mTest_HCS08_RAM)
+ [ b1 ; b2 ; b3 ] mTest_HCS08_RAM)
+ (build_memory_type_of_mcu_version (FamilyHCS08 MC9S08AW60) t)
+ (mk_byte8 x0 x0) (mk_byte8 x0 x0) (* non deterministici tutti a 0 *)
+ false false false false false false) (* non deterministici tutti a 0 *)
+ mTest_HCS08_prog)
+ (mk_word16 (mk_byte8 x0 x0) (mk_byte8 x6 xF)))
+ (mk_word16 (mk_byte8 x0 x0) (mk_byte8 x6 xF)).
+
+(* dimostrazione senza svolgimento degli stati, immediata *)
+(* NB: la memoria e' cambiata e bisogna applicare eq_status *)
+nlemma ok_mTest_HCS08_CBEQ_DBNZ_full :
+∀t:memory_impl.
+ eq_anystatus HCS08 t
+ (match execute HCS08 t (TickOK ? (mTest_HCS08_CBEQ_DBNZ_status t 〈x0,x0〉 〈x0,x1〉 〈x0,x2〉)) nat68
+ with [ TickERR s _ ⇒ s | TickSUSP s _ ⇒ s | TickOK s ⇒ s ])
+ (set_acc_8_low_reg HCS08 t (* nuovo A *)
+ (set_pc_reg HCS08 t (* nuovo PC *)
+ (setweak_indX_16_reg HCS08 t (mTest_HCS08_CBEQ_DBNZ_status t 〈xF,xE〉 〈x0,x1〉 〈x0,x0〉) (* nuovo H:X *)
+ (mk_word16 〈x0,x0〉 〈x7,x0〉))
+ (mk_word16 〈x1,x8〉 〈x8,xE〉))
+ (mk_byte8 xF xF))
+ [ 〈〈x0,x0〉:〈x7,x0〉〉 ; 〈〈x0,x0〉:〈x7,x1〉〉 ; 〈〈x0,x0〉:〈x7,x2〉〉 ] = true.
+ #t;
+ napply (eq_to_eqanystatus_weak [ 〈〈x0,x0〉:〈x7,x0〉〉 ; 〈〈x0,x0〉:〈x7,x1〉〉 ; 〈〈x0,x0〉:〈x7,x2〉〉 ] HCS08 t
+ (match execute HCS08 t (TickOK ? (mTest_HCS08_CBEQ_DBNZ_status t 〈x0,x0〉 〈x0,x1〉 〈x0,x2〉)) nat68
+ with [ TickERR s _ ⇒ s | TickSUSP s _ ⇒ s | TickOK s ⇒ s ])
+ (set_acc_8_low_reg HCS08 t (* nuovo A *)
+ (set_pc_reg HCS08 t (* nuovo PC *)
+ (setweak_indX_16_reg HCS08 t (mTest_HCS08_CBEQ_DBNZ_status t 〈xF,xE〉 〈x0,x1〉 〈x0,x0〉) (* nuovo H:X *)
+ (mk_word16 〈x0,x0〉 〈x7,x0〉))
+ (mk_word16 〈x1,x8〉 〈x8,xE〉))
+ (mk_byte8 xF xF)));
+ nelim t;
+ nnormalize in ⊢ (? ? ? %);
+ napply refl_eq.
+nqed.
projects / helm.git / blobdiff