--- /dev/null
+(**************************************************************************)
+(* ___ *)
+(* ||M|| *)
+(* ||A|| A project by Andrea Asperti *)
+(* ||T|| *)
+(* ||I|| Developers: *)
+(* ||T|| The HELM team. *)
+(* ||A|| http://helm.cs.unibo.it *)
+(* \ / *)
+(* \ / This file is distributed under the terms of the *)
+(* v GNU General Public License Version 2 *)
+(* *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(* Progetto FreeScale *)
+(* *)
+(* Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it *)
+(* Ultima modifica: 05/08/2009 *)
+(* *)
+(* ********************************************************************** *)
+
+include "freescale_tests/micro_tests_tools.ma".
+include "freescale/multivm.ma".
+include "freescale/status_lemmas.ma".
+
+(* ****************************************** *)
+(* MICRO TEST DI CORRETTEZZA DELLE ISTRUZIONI *)
+(* ****************************************** *)
+
+(* ******************* *)
+(* HCS08 BRSETn/BRCLRn *)
+(* ******************* *)
+
+ndefinition mTest_HCS08_BRSETn_BRCLRn_source ≝ let m ≝ HCS08 in source_to_byte8 m (
+(* testa la logica di BRSETn/BRCLRn e le modalita' DIRn_and_IMM1 *)
+(* BEFORE: va a testare [0x00C5]=0x55 PC=0x1860 *)
+(* [0x1860] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o0 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1863] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1864] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o1 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1867] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1868] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o2 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x186B] 1clk *) (compile m ? NOP maINH I) @
+(* [0x186C] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o3 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x186F] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1870] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o4 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1873] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1874] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o5 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1877] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1878] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o6 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x187B] 1clk *) (compile m ? NOP maINH I) @
+(* [0x187C] 5clk *) (compile m ? BRSETn (maDIRn_and_IMM1 o7 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x187F] 1clk *) (compile m ? NOP maINH I) @
+
+(* [0x1880] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o0 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1883] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1884] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o1 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1887] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1888] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o2 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x188B] 1clk *) (compile m ? NOP maINH I) @
+(* [0x188C] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o3 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x188F] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1890] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o4 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1893] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1894] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o5 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x1897] 1clk *) (compile m ? NOP maINH I) @
+(* [0x1898] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o6 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x189B] 1clk *) (compile m ? NOP maINH I) @
+(* [0x189C] 5clk *) (compile m ? BRCLRn (maDIRn_and_IMM1 o7 〈xC,x5〉 〈x0,x1〉) I) @
+(* [0x189F] 1clk *) (compile m ? NOP maINH I)
+
+(* [0x18A0] si puo' quindi enunciare che dopo 80+8=88 clk
+ (vengono eseguiti 16*5 test, meta' BRSETn/BRCLRn saltano *)
+(* PC<-0x18A0 *)
+).
+
+(* creazione del processore+caricamento+impostazione registri *)
+ndefinition mTest_HCS08_BRSETn_BRCLRn_status ≝
+λt:memory_impl.
+ set_pc_reg HCS08 t (* PC<-mTest_HCS08_prog *)
+ (start_of_mcu_version_HCS08
+ MC9S08AW60 t
+ (load_from_source_at t
+ (load_from_source_at t (zero_memory t) (* carica mTest_bytes in RAM:mTest_HCS08_RAM *)
+ mTest_HCS08_BRSETn_BRCLRn_source mTest_HCS08_prog) (* carica source in ROM:mTest_HCS08_prog *)
+ mTest_bytes mTest_HCS08_RAM)
+ (build_memory_type_of_mcu_version (FamilyHCS08 MC9S08AW60) t)
+ (mk_byte8 x0 x0) (mk_byte8 x0 x0) (* non deterministici tutti a 0 *)
+ false false false false false false) (* non deterministici tutti a 0 *)
+ mTest_HCS08_prog.
+
+(* dimostrazione senza svolgimento degli stati, immediata *)
+nlemma ok_mTest_HCS08_BRSETn_BRCLRn_full :
+ ∀t:memory_impl.
+ execute HCS08 t (TickOK ? (mTest_HCS08_BRSETn_BRCLRn_status t)) nat88 =
+ TickOK ? (set_pc_reg HCS08 t (mTest_HCS08_BRSETn_BRCLRn_status t) (* nuovo PC *)
+ (mk_word16 〈x1,x8〉 〈xA,x0〉)).
+ #t; nelim t;
+ napply refl_eq.
+nqed.