X-Git-Url: http://matita.cs.unibo.it/gitweb/?a=blobdiff_plain;f=helm%2Fsoftware%2Fmatita%2Fcontribs%2Fng_assembly%2Femulator%2Fopcodes%2FRS08_instr_mode.ma;fp=helm%2Fsoftware%2Fmatita%2Fcontribs%2Fng_assembly%2Femulator%2Fopcodes%2FRS08_instr_mode.ma;h=0d5a311b311d257d4b9beef25890e20e1d2d713b;hb=0f13d14b63b012e0ea8ce0d0e71bf808fdd444eb;hp=0000000000000000000000000000000000000000;hpb=16d0ba4a14fd6bede3e8b3520af7deaefb4f8068;p=helm.git diff --git a/helm/software/matita/contribs/ng_assembly/emulator/opcodes/RS08_instr_mode.ma b/helm/software/matita/contribs/ng_assembly/emulator/opcodes/RS08_instr_mode.ma new file mode 100755 index 000000000..0d5a311b3 --- /dev/null +++ b/helm/software/matita/contribs/ng_assembly/emulator/opcodes/RS08_instr_mode.ma @@ -0,0 +1,102 @@ +(**************************************************************************) +(* ___ *) +(* ||M|| *) +(* ||A|| A project by Andrea Asperti *) +(* ||T|| *) +(* ||I|| Developers: *) +(* ||T|| The HELM team. *) +(* ||A|| http://helm.cs.unibo.it *) +(* \ / *) +(* \ / This file is distributed under the terms of the *) +(* v GNU General Public License Version 2 *) +(* *) +(**************************************************************************) + +(* ********************************************************************** *) +(* Progetto FreeScale *) +(* *) +(* Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it *) +(* Sviluppo: 2008-2010 *) +(* *) +(* ********************************************************************** *) + +include "num/word16.ma". + +(* ********************************************** *) +(* MATTONI BASE PER DEFINIRE LE TABELLE DELLE MCU *) +(* ********************************************** *) + +(* enumerazione delle modalita' di indirizzamento = caricamento degli operandi *) +ninductive RS08_instr_mode: Type ≝ + (* INHERENT = nessun operando *) + MODE_INH : RS08_instr_mode + (* INHERENT = nessun operando (A implicito) *) +| MODE_INHA : RS08_instr_mode + + (* IMMEDIATE = operando valore immediato byte = 0xbb *) +| MODE_IMM1 : RS08_instr_mode + (* IMMEDIATE = operando valore immediato word = 0xwwww *) +| MODE_IMM2 : RS08_instr_mode + (* DIRECT = operando offset byte = [0x00bb] *) +| MODE_DIR1 : RS08_instr_mode + + (* DIRECT → DIRECT = carica da diretto/scrive su diretto *) +| MODE_DIR1_to_DIR1 : RS08_instr_mode + (* IMMEDIATE → DIRECT = carica da immediato/scrive su diretto *) +| MODE_IMM1_to_DIR1 : RS08_instr_mode + + (* INHERENT(A) + IMMEDIATE *) +| MODE_INHA_and_IMM1 : RS08_instr_mode + (* IMMEDIATE + IMMEDIATE *) +| MODE_IMM1_and_IMM1 : RS08_instr_mode + (* DIRECT + IMMEDIATE *) +| MODE_DIR1_and_IMM1 : RS08_instr_mode + + (* DIRECT(mTNY) = operando offset byte(maschera scrittura implicita 3 bit) *) + (* ex: DIR3 e' carica b, scrivi b con n-simo bit modificato *) +| MODE_DIRn : oct → RS08_instr_mode + (* DIRECT(mTNY) + IMMEDIATE = operando offset byte(maschera lettura implicita 3 bit) *) + (* + operando valore immediato byte *) + (* ex: DIR2_and_IMM1 e' carica b, carica imm, restituisci n-simo bit di b + imm *) +| MODE_DIRn_and_IMM1 : oct → RS08_instr_mode + (* TINY = nessun operando (diretto implicito 4bit = [0x00000000:0000iiii]) *) +| MODE_TNY : exadecim → RS08_instr_mode + (* SHORT = nessun operando (diretto implicito 5bit = [0x00000000:000iiiii]) *) +| MODE_SRT : bitrigesim → RS08_instr_mode +. + +ndefinition eq_RS08_im ≝ +λi1,i2:RS08_instr_mode. + match i1 with + [ MODE_INH ⇒ match i2 with [ MODE_INH ⇒ true | _ ⇒ false ] + | MODE_INHA ⇒ match i2 with [ MODE_INHA ⇒ true | _ ⇒ false ] + | MODE_IMM1 ⇒ match i2 with [ MODE_IMM1 ⇒ true | _ ⇒ false ] + | MODE_IMM2 ⇒ match i2 with [ MODE_IMM2 ⇒ true | _ ⇒ false ] + | MODE_DIR1 ⇒ match i2 with [ MODE_DIR1 ⇒ true | _ ⇒ false ] + | MODE_DIR1_to_DIR1 ⇒ match i2 with [ MODE_DIR1_to_DIR1 ⇒ true | _ ⇒ false ] + | MODE_IMM1_to_DIR1 ⇒ match i2 with [ MODE_IMM1_to_DIR1 ⇒ true | _ ⇒ false ] + | MODE_INHA_and_IMM1 ⇒ match i2 with [ MODE_INHA_and_IMM1 ⇒ true | _ ⇒ false ] + | MODE_IMM1_and_IMM1 ⇒ match i2 with [ MODE_IMM1_and_IMM1 ⇒ true | _ ⇒ false ] + | MODE_DIR1_and_IMM1 ⇒ match i2 with [ MODE_DIR1_and_IMM1 ⇒ true | _ ⇒ false ] + | MODE_DIRn n1 ⇒ match i2 with [ MODE_DIRn n2 ⇒ eq_oct n1 n2 | _ ⇒ false ] + | MODE_DIRn_and_IMM1 n1 ⇒ match i2 with [ MODE_DIRn_and_IMM1 n2 ⇒ eq_oct n1 n2 | _ ⇒ false ] + | MODE_TNY e1 ⇒ match i2 with [ MODE_TNY e2 ⇒ eq_ex e1 e2 | _ ⇒ false ] + | MODE_SRT t1 ⇒ match i2 with [ MODE_SRT t2 ⇒ eq_bit t1 t2 | _ ⇒ false ] + ]. + +(* iteratore sulle modalita' *) +ndefinition forall_RS08_im ≝ λP:RS08_instr_mode → bool. + P MODE_INH +⊗ P MODE_INHA +⊗ P MODE_IMM1 +⊗ P MODE_IMM2 +⊗ P MODE_DIR1 +⊗ P MODE_DIR1_to_DIR1 +⊗ P MODE_IMM1_to_DIR1 +⊗ P MODE_INHA_and_IMM1 +⊗ P MODE_IMM1_and_IMM1 +⊗ P MODE_DIR1_and_IMM1 +⊗ forall_oct (λo. P (MODE_DIRn o)) +⊗ forall_oct (λo. P (MODE_DIRn_and_IMM1 o)) +⊗ forall_ex (λe. P (MODE_TNY e)) +⊗ forall_bit (λt. P (MODE_SRT t)).