X-Git-Url: http://matita.cs.unibo.it/gitweb/?a=blobdiff_plain;f=helm%2Fsoftware%2Fmatita%2Fcontribs%2Fng_assembly%2Femulator%2Fstatus%2FHC05_status.ma;h=b6367ab525308f6eec21568e320bf93f30b0727d;hb=b886a562ccbfc3f63b8f64a135bcf70e4b189999;hp=4e73b5762c9d683a29803573af0f039d64d72de7;hpb=34cdd4af2d7bdac3bab74a54123fbfcb02fa0403;p=helm.git diff --git a/helm/software/matita/contribs/ng_assembly/emulator/status/HC05_status.ma b/helm/software/matita/contribs/ng_assembly/emulator/status/HC05_status.ma index 4e73b5762..b6367ab52 100755 --- a/helm/software/matita/contribs/ng_assembly/emulator/status/HC05_status.ma +++ b/helm/software/matita/contribs/ng_assembly/emulator/status/HC05_status.ma @@ -68,6 +68,190 @@ notation "{hvbox('A_Reg' ≝ acclow ; break 'X_Reg' ≝ indxlow ; break 'Sp_Reg' interpretation "mk_alu_HC05" 'mk_alu_HC05 acclow indxlow sp spm spf pc pcm hfl ifl nfl zfl cfl irqfl = (mk_alu_HC05 acclow indxlow sp spm spf pc pcm hfl ifl nfl zfl cfl irqfl). +(* ****** *) +(* SETTER *) +(* ****** *) + +(* setter specifico HC05 di A *) +ndefinition set_acc_8_low_reg_HC05 ≝ +λalu.λacclow':byte8. + mk_alu_HC05 + acclow' + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + (n_flag_HC05 alu) + (z_flag_HC05 alu) + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di X *) +ndefinition set_indX_8_low_reg_HC05 ≝ +λalu.λindxlow':byte8. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + indxlow' + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + (n_flag_HC05 alu) + (z_flag_HC05 alu) + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di SP, effettua (SP∧mask)∨fix *) +ndefinition set_sp_reg_HC05 ≝ +λalu.λsp':word16. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (or_w16 (and_w16 sp' (sp_mask_HC05 alu)) (sp_fix_HC05 alu)) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + (n_flag_HC05 alu) + (z_flag_HC05 alu) + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di PC, effettua PC∧mask *) +ndefinition set_pc_reg_HC05 ≝ +λalu.λpc':word16. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (and_w16 pc' (pc_mask_HC05 alu)) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + (n_flag_HC05 alu) + (z_flag_HC05 alu) + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di H *) +ndefinition set_h_flag_HC05 ≝ +λalu.λhfl':bool. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + hfl' + (i_flag_HC05 alu) + (n_flag_HC05 alu) + (z_flag_HC05 alu) + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di I *) +ndefinition set_i_flag_HC05 ≝ +λalu.λifl':bool. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + ifl' + (n_flag_HC05 alu) + (z_flag_HC05 alu) + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di N *) +ndefinition set_n_flag_HC05 ≝ +λalu.λnfl':bool. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + nfl' + (z_flag_HC05 alu) + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di Z *) +ndefinition set_z_flag_HC05 ≝ +λalu.λzfl':bool. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + (n_flag_HC05 alu) + zfl' + (c_flag_HC05 alu) + (irq_flag_HC05 alu). + +(* setter specifico HC05 di C *) +ndefinition set_c_flag_HC05 ≝ +λalu.λcfl':bool. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + (n_flag_HC05 alu) + (z_flag_HC05 alu) + cfl' + (irq_flag_HC05 alu). + +(* setter specifico HC05 di IRQ *) +ndefinition set_irq_flag_HC05 ≝ +λalu.λirqfl':bool. + mk_alu_HC05 + (acc_low_reg_HC05 alu) + (indX_low_reg_HC05 alu) + (sp_reg_HC05 alu) + (sp_mask_HC05 alu) + (sp_fix_HC05 alu) + (pc_reg_HC05 alu) + (pc_mask_HC05 alu) + (h_flag_HC05 alu) + (i_flag_HC05 alu) + (n_flag_HC05 alu) + (z_flag_HC05 alu) + (c_flag_HC05 alu) + irqfl'. + (* ***************** *) (* CONFRONTO FRA ALU *) (* ***************** *)