From: Cosimo Oliboni <??>
Date: Mon, 25 Jan 2010 22:17:28 +0000 (+0000)
Subject:  freescale porting
X-Git-Tag: make_still_working~3094
X-Git-Url: http://matita.cs.unibo.it/gitweb/?a=commitdiff_plain;h=434258767bd3307ea05d9eab48892a6fff73888d;p=helm.git

 freescale porting
---

diff --git a/helm/software/matita/contribs/ng_assembly/depends b/helm/software/matita/contribs/ng_assembly/depends
index a54a98e1e..794267240 100644
--- a/helm/software/matita/contribs/ng_assembly/depends
+++ b/helm/software/matita/contribs/ng_assembly/depends
@@ -1,3 +1,4 @@
+emulator/model/HCS08_model.ma emulator/status/status.ma
 common/prod_lemmas.ma common/prod.ma num/bool_lemmas.ma
 emulator/opcodes/HC05_table_tests.ma emulator/opcodes/HC05_table.ma emulator/opcodes/opcode.ma
 num/bool.ma common/theory.ma
@@ -12,6 +13,7 @@ num/exadecim.ma common/nat.ma common/prod.ma num/bool.ma num/oct.ma num/quatern.
 num/bitrigesim_lemmas.ma num/bitrigesim.ma num/bool_lemmas.ma
 emulator/status/status.ma emulator/memory/memory_abs.ma emulator/opcodes/opcode.ma emulator/status/HC05_status.ma emulator/status/HC08_status.ma emulator/status/IP2022_status.ma emulator/status/RS08_status.ma
 num/byte8.ma num/bitrigesim.ma num/exadecim.ma
+emulator/model/model.ma emulator/model/HC05_model.ma emulator/model/HC08_model.ma emulator/model/HCS08_model.ma emulator/model/IP2022_model.ma emulator/model/RS08_model.ma
 emulator/opcodes/HC08_table.ma common/list.ma emulator/opcodes/HC08_instr_mode.ma emulator/opcodes/HC08_opcode.ma emulator/opcodes/byte_or_word.ma
 common/nat_lemmas.ma common/nat.ma num/bool_lemmas.ma
 emulator/opcodes/HC05_table.ma common/list.ma emulator/opcodes/HC05_instr_mode.ma emulator/opcodes/HC05_opcode.ma emulator/opcodes/byte_or_word.ma
@@ -28,8 +30,8 @@ emulator/translation/translation_base.ma common/option.ma emulator/opcodes/HC05_
 emulator/opcodes/IP2022_table.ma common/list.ma emulator/opcodes/IP2022_instr_mode.ma emulator/opcodes/IP2022_opcode.ma emulator/opcodes/byte_or_word.ma
 emulator/status/HC05_status.ma num/word16.ma
 emulator/memory/memory_bits.ma emulator/memory/memory_trees.ma
-common/string.ma common/ascii.ma common/list_utility.ma
 common/theory.ma 
+common/string.ma common/ascii.ma common/list_utility.ma
 emulator/opcodes/byte_or_word.ma num/word16.ma
 compiler/ast_type.ma common/list_utility.ma
 num/word16.ma num/byte8.ma
@@ -43,15 +45,18 @@ num/word16_lemmas.ma num/byte8_lemmas.ma num/word16.ma
 emulator/status/status_getter.ma emulator/status/status_setter.ma
 num/word24.ma num/byte8.ma
 num/bool_lemmas.ma num/bool.ma
+emulator/model/HC08_model.ma emulator/status/status.ma
 emulator/memory/memory_abs.ma emulator/memory/memory_bits.ma emulator/memory/memory_func.ma emulator/memory/memory_trees.ma
 emulator/opcodes/RS08_opcode.ma num/bool.ma
 num/oct_lemmas.ma num/bool_lemmas.ma num/oct.ma
 emulator/memory/memory_struct.ma num/byte8.ma num/oct.ma
 emulator/translation/RS08_translation.ma emulator/translation/translation_base.ma
+emulator/model/HC05_model.ma emulator/status/status.ma
 emulator/status/status_setter.ma emulator/status/status.ma
 emulator/translation/HC05_translation.ma emulator/translation/translation_base.ma
 num/word32.ma num/word16.ma
 common/ascii.ma num/bool.ma
+emulator/model/IP2022_model.ma emulator/status/status.ma
 emulator/opcodes/HCS08_table_tests.ma emulator/opcodes/HCS08_table.ma emulator/opcodes/opcode.ma
 emulator/opcodes/HC05_instr_mode.ma num/word16.ma
 emulator/opcodes/IP2022_table_tests.ma emulator/opcodes/IP2022_table.ma emulator/opcodes/opcode.ma
@@ -66,6 +71,7 @@ common/option.ma num/bool.ma
 common/option_lemmas.ma common/option.ma num/bool_lemmas.ma
 num/byte8_lemmas.ma num/byte8.ma num/exadecim_lemmas.ma
 emulator/opcodes/RS08_table.ma common/list.ma emulator/opcodes/RS08_instr_mode.ma emulator/opcodes/RS08_opcode.ma emulator/opcodes/byte_or_word.ma
+emulator/model/RS08_model.ma emulator/status/status.ma
 common/sigma.ma common/theory.ma
 common/list_lemmas.ma common/list.ma
 emulator/opcodes/HCS08_table.ma common/list.ma emulator/opcodes/HC08_instr_mode.ma emulator/opcodes/HCS08_opcode.ma emulator/opcodes/byte_or_word.ma
diff --git a/helm/software/matita/contribs/ng_assembly/emulator/model/HC05_model.ma b/helm/software/matita/contribs/ng_assembly/emulator/model/HC05_model.ma
new file mode 100755
index 000000000..8fbd3da12
--- /dev/null
+++ b/helm/software/matita/contribs/ng_assembly/emulator/model/HC05_model.ma
@@ -0,0 +1,108 @@
+(**************************************************************************)
+(*       ___                                                              *)
+(*      ||M||                                                             *)
+(*      ||A||       A project by Andrea Asperti                           *)
+(*      ||T||                                                             *)
+(*      ||I||       Developers:                                           *)
+(*      ||T||         The HELM team.                                      *)
+(*      ||A||         http://helm.cs.unibo.it                             *)
+(*      \   /                                                             *)
+(*       \ /        This file is distributed under the terms of the       *)
+(*        v         GNU General Public License Version 2                  *)
+(*                                                                        *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(*                          Progetto FreeScale                            *)
+(*                                                                        *)
+(*   Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it              *)
+(*   Sviluppo: 2008-2010                                                  *)
+(*                                                                        *)
+(* ********************************************************************** *)
+
+include "emulator/status/status.ma".
+
+(* *********************************** *)
+(* IMPOSTAZIONI SPECIFICHE DEI MODELLI *)
+(* *********************************** *)
+
+(* modelli di HC05 *)
+ninductive HC05_model : Type ≝
+  MC68HC05J5A: HC05_model
+  (*..*).
+
+(* memoria degli HC05 *)
+ndefinition memory_type_of_FamilyHC05 ≝
+λm:HC05_model.match m with
+ [ MC68HC05J5A ⇒
+  [ (* astraggo molto *)
+(* 0x0000-0x001F,0x0FF0: sarebbe memory mapped IO *)
+(* 0x0080-0x00FF *)   triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x8,x0〉〉〉 〈〈x0,x0〉:〈x8,x0〉〉 MEM_READ_WRITE (* 128B RAM+STACK *)
+(* 0x0300-0x0CFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x3〉:〈x0,x0〉〉〉 〈〈x0,xA〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 2560B USER ROM *)
+(* 0x0E00-0x0FFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,xE〉:〈x0,x0〉〉〉 〈〈x0,x2〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 512B INTERNAL ROM *) ]
+ (* etc.. *)
+ ].
+
+(* 
+   parametrizzati i non deterministici rispetto a tutti i valori casuali
+   che verranno dati dall'esterno di tipo byte8 (ndby1-2) e bool (ndbo1-5).
+   l'ACCENSIONE e' totalmente equivalente ad un reset causato da calo di tensione
+   (reset V-low), la memoria ed il check possono essere passati
+*)
+ndefinition start_of_model_HC05 ≝
+λmcu:HC05_model.λt:memory_impl.
+λmem:aux_mem_type t.λchk:aux_chk_type t.
+λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
+ let build ≝ λspm,spf,pcm:word16.
+  mk_any_status HC05 t
+   (mk_alu_HC05
+    (* acc_low: ? *) ndby1
+    (* indx_low: ? *) ndby2 
+    (* sp: reset *) (or_w16 (and_w16 〈〈x0,x0〉:〈xF,xF〉〉 spm) spf)
+    (* spm *) spm
+    (* spf *) spf
+    (* pc: reset+fetch *) (and_w16 (mk_word16 (mem_read_abs t mem 〈〈〈x0,x0〉:〈x0,x0〉〉.(and_w16 〈〈xF,xF〉:〈xF,xE〉〉 pcm)〉) 
+                                              (mem_read_abs t mem 〈〈〈x0,x0〉:〈x0,x0〉〉.(and_w16 〈〈xF,xF〉:〈xF,xF〉〉 pcm)〉)) pcm)
+    (* pcm *) pcm
+    (* H: ? *) ndbo1
+    (* I: reset *) true
+    (* N: ? *) ndbo2
+    (* Z: ? *) ndbo3
+    (* C: ? *) ndbo4
+    (* IRQ: ? *) irqfl)
+    (* mem *) mem
+    (* chk *) chk
+    (* clk: reset *) (None ?) in
+ match mcu with
+  [ MC68HC05J5A ⇒ build 〈〈x0,x0〉:〈x3,xF〉〉 〈〈x0,x0〉:〈xC,x0〉〉 〈〈x0,xF〉:〈xF,xF〉〉
+    (*..*)
+  ].
+
+(* 
+   cio' che non viene resettato mantiene il valore precedente: nella documentazione
+   viene riportato come "unaffected"/"indeterminate"/"unpredictable"
+   il soft RESET e' diverso da un calo di tensione e la ram non variera'
+*)
+ndefinition reset_of_model_HC05 ≝
+λt:memory_impl.λs:any_status HC05 t.
+ (mk_any_status HC05 t
+  (mk_alu_HC05
+   (* acc_low: inv. *) (acc_low_reg_HC05 (alu ? t s))
+   (* indx_low: inv. *) (indX_low_reg_HC05 (alu ? t s))
+   (* sp: reset *) (or_w16 (and_w16 〈〈x0,x0〉:〈xF,xF〉〉 (sp_mask_HC05 (alu ? t s)))
+                           (sp_fix_HC05 (alu ? t s)))
+   (* spm: inv. *) (sp_mask_HC05 (alu ? t s))
+   (* spf: inv. *) (sp_fix_HC05 (alu ? t s))
+   (* pc: reset+fetch *) (and_w16 (mk_word16 (mem_read_abs t (mem_desc ? t s) 〈〈〈x0,x0〉:〈x0,x0〉〉.(and_w16 〈〈xF,xF〉:〈xF,xE〉〉 (pc_mask_HC05 (alu ? t s)))〉)
+                                             (mem_read_abs t (mem_desc ? t s) 〈〈〈x0,x0〉:〈x0,x0〉〉.(and_w16 〈〈xF,xF〉:〈xF,xF〉〉 (pc_mask_HC05 (alu ? t s)))〉))
+                                  (pc_mask_HC05 (alu ? t s)))
+   (* pcm: inv. *) (pc_mask_HC05 (alu ? t s))
+   (* H: inv. *) (h_flag_HC05 (alu ? t s))
+   (* I: reset *) true
+   (* N: inv. *) (n_flag_HC05 (alu ? t s))
+   (* Z: inv. *) (z_flag_HC05 (alu ? t s))
+   (* C: inv. *) (c_flag_HC05 (alu ? t s))
+   (* IRQ: inv *) (irq_flag_HC05 (alu ? t s)))
+   (* mem: inv. *) (mem_desc ? t s)
+   (* chk: inv. *) (chk_desc ? t s)
+   (* clk: reset *) (None ?)).
diff --git a/helm/software/matita/contribs/ng_assembly/emulator/model/HC08_model.ma b/helm/software/matita/contribs/ng_assembly/emulator/model/HC08_model.ma
new file mode 100755
index 000000000..0400439ae
--- /dev/null
+++ b/helm/software/matita/contribs/ng_assembly/emulator/model/HC08_model.ma
@@ -0,0 +1,104 @@
+(**************************************************************************)
+(*       ___                                                              *)
+(*      ||M||                                                             *)
+(*      ||A||       A project by Andrea Asperti                           *)
+(*      ||T||                                                             *)
+(*      ||I||       Developers:                                           *)
+(*      ||T||         The HELM team.                                      *)
+(*      ||A||         http://helm.cs.unibo.it                             *)
+(*      \   /                                                             *)
+(*       \ /        This file is distributed under the terms of the       *)
+(*        v         GNU General Public License Version 2                  *)
+(*                                                                        *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(*                          Progetto FreeScale                            *)
+(*                                                                        *)
+(*   Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it              *)
+(*   Sviluppo: 2008-2010                                                  *)
+(*                                                                        *)
+(* ********************************************************************** *)
+
+include "emulator/status/status.ma".
+
+(* *********************************** *)
+(* IMPOSTAZIONI SPECIFICHE DEI MODELLI *)
+(* *********************************** *)
+
+(* modelli di HC08 *)
+ninductive HC08_model : Type ≝
+  MC68HC08AB16A: HC08_model
+  (*..*). 
+
+(* memoria degli HC08 *)
+ndefinition memory_type_of_FamilyHC08 ≝
+λm:HC08_model.match m with
+ [ MC68HC08AB16A ⇒
+  [ (* astraggo molto *) 
+(* 0x0000-0x004F,0xFE00-0xFE01,0xFE03,
+   0xFE0C-0xFE11,0xFE1A-0xFE1D,0xFE1F: sarebbe memory mapped IO *)
+(* 0x0500-0x057F,0xFE02,0xFE04-0xFE07,
+   0xFE09-0xFE0B,0xFE12-0xFE19,0xFE1E,0xFFC0-0xFFCF : sarebbe reserved *)
+(* 0x0050-0x024F *)   triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x5,x0〉〉〉 〈〈x0,x2〉:〈x0,x0〉〉 MEM_READ_WRITE (* 512B RAM *)
+(* 0x0800-0x09FF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x8〉:〈x0,x0〉〉〉 〈〈x0,x2〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 512B EEPROM *)
+(* 0xBE00-0xFDFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xB,xE〉:〈x0,x0〉〉〉 〈〈x4,x0〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 16384B ROM *)
+(* 0xFE20-0xFF52 *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xE〉:〈x2,x0〉〉〉 〈〈x0,x1〉:〈x3,x3〉〉 MEM_READ_ONLY  (* 307B ROM *)
+(* 0xFFD0-0xFFFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xD,x0〉〉〉 〈〈x0,x0〉:〈x3,x0〉〉 MEM_READ_ONLY  (* 48B ROM *) ]
+  (* etc... *)
+  ].
+
+(* 
+   parametrizzati i non deterministici rispetto a tutti i valori casuali
+   che verranno dati dall'esterno di tipo byte8 (ndby1-2) e bool (ndbo1-5).
+   l'ACCENSIONE e' totalmente equivalente ad un reset causato da calo di tensione
+   (reset V-low), la memoria ed il check possono essere passati
+*)
+ndefinition start_of_model_HC08 ≝
+λmcu:HC08_model.λt:memory_impl.
+λmem:aux_mem_type t.λchk:aux_chk_type t.
+λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
+ mk_any_status HC08 t
+  (mk_alu_HC08
+   (* acc_low: ? *) ndby1
+   (* indw_low: ? *) ndby2
+   (* indx_high: reset *)  〈x0,x0〉
+   (* sp: reset *) 〈〈x0,x0〉:〈xF,xF〉〉
+   (* pc: reset+fetch *) (mk_word16 (mem_read_abs t mem 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xE〉〉〉) 
+                                    (mem_read_abs t mem 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xF〉〉〉))
+   (* V: ? *) ndbo1
+   (* H: ? *) ndbo2
+   (* I: reset *) true
+   (* N: ? *) ndbo3
+   (* Z: ? *) ndbo4
+   (* C: ? *) ndbo5
+   (* IRQ: ? *) irqfl)
+   (* mem *) mem
+   (* chk *) chk
+   (* clk: reset *) (None ?).
+
+(* 
+   cio' che non viene resettato mantiene il valore precedente: nella documentazione
+   viene riportato come "unaffected"/"indeterminate"/"unpredictable"
+   il soft RESET e' diverso da un calo di tensione e la ram non variera'
+*)
+ndefinition reset_of_model_HC08 ≝
+λt:memory_impl.λs:any_status HC08 t.
+ (mk_any_status HC08 t
+  (mk_alu_HC08
+   (* acc_low: inv. *) (acc_low_reg_HC08 (alu ? t s))
+   (* indx_low: inv. *) (indX_low_reg_HC08 (alu ? t s))
+   (* indx_high: reset *) 〈x0,x0〉
+   (* sp: reset *) 〈〈x0,x0〉:〈xF,xF〉〉
+   (* pc: reset+fetch *) (mk_word16 (mem_read_abs t (mem_desc ? t s) 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xE〉〉〉)
+                                    (mem_read_abs t (mem_desc ? t s) 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xE〉〉〉))
+   (* V: inv. *) (v_flag_HC08 (alu ? t s))
+   (* H: inv. *) (h_flag_HC08 (alu ? t s))
+   (* I: reset *) true
+   (* N: inv. *) (n_flag_HC08 (alu ? t s))
+   (* Z: inv. *) (z_flag_HC08 (alu ? t s))
+   (* C: inv. *) (c_flag_HC08 (alu ? t s))
+   (* IRQ: inv *) (irq_flag_HC08 (alu ? t s)))
+   (* mem: inv. *) (mem_desc ? t s)
+   (* chk: inv. *) (chk_desc ? t s)
+   (* clk: reset *) (None ?)).
diff --git a/helm/software/matita/contribs/ng_assembly/emulator/model/HCS08_model.ma b/helm/software/matita/contribs/ng_assembly/emulator/model/HCS08_model.ma
new file mode 100755
index 000000000..71acc536a
--- /dev/null
+++ b/helm/software/matita/contribs/ng_assembly/emulator/model/HCS08_model.ma
@@ -0,0 +1,106 @@
+(**************************************************************************)
+(*       ___                                                              *)
+(*      ||M||                                                             *)
+(*      ||A||       A project by Andrea Asperti                           *)
+(*      ||T||                                                             *)
+(*      ||I||       Developers:                                           *)
+(*      ||T||         The HELM team.                                      *)
+(*      ||A||         http://helm.cs.unibo.it                             *)
+(*      \   /                                                             *)
+(*       \ /        This file is distributed under the terms of the       *)
+(*        v         GNU General Public License Version 2                  *)
+(*                                                                        *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(*                          Progetto FreeScale                            *)
+(*                                                                        *)
+(*   Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it              *)
+(*   Sviluppo: 2008-2010                                                  *)
+(*                                                                        *)
+(* ********************************************************************** *)
+
+include "emulator/status/status.ma".
+
+(* *********************************** *)
+(* IMPOSTAZIONI SPECIFICHE DEI MODELLI *)
+(* *********************************** *)
+
+(* modelli di HCS08 *)
+ninductive HCS08_model : Type ≝
+  MC9S08AW60 : HCS08_model
+| MC9S08GB60 : HCS08_model
+  (*..*).
+
+(* memoria degli HCS08 *)
+ndefinition memory_type_of_FamilyHCS08 ≝
+λm:HCS08_model.match m with
+ [ MC9S08AW60 ⇒
+  [  (* astraggo molto *)
+(* 0x0000-0x006F,0x1800-0x185F: sarebbe memory mapped IO *)
+(* 0x0070-0x086F *)   triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x7,x0〉〉〉 〈〈x0,x8〉:〈x0,x0〉〉 MEM_READ_WRITE (* 2048B RAM *)
+(* 0x0870-0x17FF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x8〉:〈x7,x0〉〉〉 〈〈x0,xF〉:〈x9,x0〉〉 MEM_READ_ONLY  (* 3984B FLASH *)
+(* 0x1860-0xFFFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x1,x8〉:〈x6,x0〉〉〉 〈〈xE,x7〉:〈xA,x0〉〉 MEM_READ_ONLY  (* 59296B FLASH *) ]
+ | MC9S08GB60 ⇒
+  [  (* astraggo molto *)
+(* 0x0000-0x006F,0x1800-0x185F: sarebbe memory mapped IO *)
+(* 0x0080-0x107F *)   triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x8,x0〉〉〉 〈〈x1,x0〉:〈x0,x0〉〉 MEM_READ_WRITE (* 4096B RAM *)
+(* 0x1080-0x17FF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x1,x0〉:〈x8,x0〉〉〉 〈〈x0,x7〉:〈x8,x0〉〉 MEM_READ_ONLY  (* 1920B FLASH *)
+(* 0x182C-0xFFFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x1,x8〉:〈x2,xC〉〉〉 〈〈xE,x7〉:〈xD,x4〉〉 MEM_READ_ONLY  (* 59348B FLASH *) ]
+ (* etc... *)
+ ].
+
+(* 
+   parametrizzati i non deterministici rispetto a tutti i valori casuali
+   che verranno dati dall'esterno di tipo byte8 (ndby1-2) e bool (ndbo1-5).
+   l'ACCENSIONE e' totalmente equivalente ad un reset causato da calo di tensione
+   (reset V-low), la memoria ed il check possono essere passati
+*)
+ndefinition start_of_model_HCS08 ≝
+λmcu:HCS08_model.λt:memory_impl.
+λmem:aux_mem_type t.λchk:aux_chk_type t.
+λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
+ mk_any_status HCS08 t
+  (mk_alu_HC08
+   (* acc_low: ? *) ndby1
+   (* indw_low: ? *) ndby2
+   (* indx_high: reset *)  〈x0,x0〉
+   (* sp: reset *) 〈〈x0,x0〉:〈xF,xF〉〉
+   (* pc: reset+fetch *) (mk_word16 (mem_read_abs t mem 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xE〉〉〉) 
+                                    (mem_read_abs t mem 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xF〉〉〉))
+   (* V: ? *) ndbo1
+   (* H: ? *) ndbo2
+   (* I: reset *) true
+   (* N: ? *) ndbo3
+   (* Z: ? *) ndbo4
+   (* C: ? *) ndbo5
+   (* IRQ: ? *) irqfl)
+   (* mem *) mem
+   (* chk *) chk
+   (* clk: reset *) (None ?).
+
+(* 
+   cio' che non viene resettato mantiene il valore precedente: nella documentazione
+   viene riportato come "unaffected"/"indeterminate"/"unpredictable"
+   il soft RESET e' diverso da un calo di tensione e la ram non variera'
+*)
+ndefinition reset_of_model_HCS08 ≝
+λt:memory_impl.λs:any_status HCS08 t.
+ (mk_any_status HCS08 t
+  (mk_alu_HC08
+   (* acc_low: inv. *) (acc_low_reg_HC08 (alu ? t s))
+   (* indx_low: inv. *) (indX_low_reg_HC08 (alu ? t s))
+   (* indx_high: reset *) 〈x0,x0〉
+   (* sp: reset *) 〈〈x0,x0〉:〈xF,xF〉〉
+   (* pc: reset+fetch *) (mk_word16 (mem_read_abs t (mem_desc ? t s) 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xE〉〉〉)
+                                    (mem_read_abs t (mem_desc ? t s) 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈xF,xF〉:〈xF,xE〉〉〉))
+   (* V: inv. *) (v_flag_HC08 (alu ? t s))
+   (* H: inv. *) (h_flag_HC08 (alu ? t s))
+   (* I: reset *) true
+   (* N: inv. *) (n_flag_HC08 (alu ? t s))
+   (* Z: inv. *) (z_flag_HC08 (alu ? t s))
+   (* C: inv. *) (c_flag_HC08 (alu ? t s))
+   (* IRQ: inv *) (irq_flag_HC08 (alu ? t s)))
+   (* mem: inv. *) (mem_desc ? t s)
+   (* chk: inv. *) (chk_desc ? t s)
+   (* clk: reset *) (None ?)).
diff --git a/helm/software/matita/contribs/ng_assembly/emulator/model/IP2022_model.ma b/helm/software/matita/contribs/ng_assembly/emulator/model/IP2022_model.ma
new file mode 100755
index 000000000..30e8f1f03
--- /dev/null
+++ b/helm/software/matita/contribs/ng_assembly/emulator/model/IP2022_model.ma
@@ -0,0 +1,111 @@
+(**************************************************************************)
+(*       ___                                                              *)
+(*      ||M||                                                             *)
+(*      ||A||       A project by Andrea Asperti                           *)
+(*      ||T||                                                             *)
+(*      ||I||       Developers:                                           *)
+(*      ||T||         The HELM team.                                      *)
+(*      ||A||         http://helm.cs.unibo.it                             *)
+(*      \   /                                                             *)
+(*       \ /        This file is distributed under the terms of the       *)
+(*        v         GNU General Public License Version 2                  *)
+(*                                                                        *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(*                          Progetto FreeScale                            *)
+(*                                                                        *)
+(*   Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it              *)
+(*   Sviluppo: 2008-2010                                                  *)
+(*                                                                        *)
+(* ********************************************************************** *)
+
+include "emulator/status/status.ma".
+
+(* *********************************** *)
+(* IMPOSTAZIONI SPECIFICHE DEI MODELLI *)
+(* *********************************** *)
+
+(* modelli di IP2022 *)
+ninductive IP2022_model : Type ≝
+  IP2K: IP2022_model.
+
+(* memoria degli IP2022 *)
+ndefinition memory_type_of_FamilyIP2022 ≝
+λm:IP2022_model.match m with
+  [ IP2K ⇒
+   [
+(* 0x00000080-0x00000FFF *)   triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x8,x0〉〉〉 〈〈x0,xF〉:〈x8,x0〉〉 MEM_READ_WRITE (* 3968 GPR+RAM+STACK *)
+(* 0x02000000-0x02003FFF *) ; triple … 〈〈〈x0,x2〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x0,x0〉〉〉 〈〈x4,x0〉:〈x0,x0〉〉 MEM_READ_WRITE (* 16384B PROGRAM RAM *)
+(* 0x02010000-0x02013FFF *) ; triple … 〈〈〈x0,x2〉:〈x0,x1〉〉.〈〈x0,x0〉:〈x0,x0〉〉〉 〈〈x4,x0〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 16384B PROGRAM FLASH *)
+(* 0x02014000-0x02017FFF *) ; triple … 〈〈〈x0,x2〉:〈x0,x1〉〉.〈〈x4,x0〉:〈x0,x0〉〉〉 〈〈x4,x0〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 16384B PROGRAM FLASH *)
+(* 0x02018000-0x0201BFFF *) ; triple … 〈〈〈x0,x2〉:〈x0,x1〉〉.〈〈x8,x0〉:〈x0,x0〉〉〉 〈〈x4,x0〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 16384B PROGRAM FLASH *)
+(* 0x0201C000-0x0201FFFF *) ; triple … 〈〈〈x0,x2〉:〈x0,x1〉〉.〈〈xC,x0〉:〈x0,x0〉〉〉 〈〈x4,x0〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 16384B PROGRAM FLASH *) ]
+   (*..*)
+  ].
+
+(* punto di riferimento per accessi $FR, ($IP) ($DP) ($SP) *)
+ndefinition IP2022_gpr_base ≝ 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x0,x0〉〉〉.
+(* punto di riferimento per accessi ($PC) ($ADDR) *)
+ndefinition IP2022_ram_base ≝ 〈〈〈x0,x2〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x0,x0〉〉〉.
+
+(*
+   parametrizzati i non deterministici rispetto a tutti i valori casuali
+   che verranno dati dall'esterno di tipo byte8 (ndby1-2) e bool (ndbo1-5).
+   l'ACCENSIONE e' totalmente equivalente ad un reset causato da calo di tensione
+   (reset V-low), la memoria ed il check possono essere passati
+*)
+ndefinition start_of_model_IP2022 ≝
+λmcu:IP2022_model.λt:memory_impl.
+λmem:aux_mem_type t.λchk:aux_chk_type t.
+λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
+ (mk_any_status IP2022 t
+  (mk_alu_IP2022
+   (* acc_low: reset *) 〈x0,x0〉
+   (* mulh: reset *) 〈x0,x0〉
+   (* addrsel: reset *) 〈x0,x0〉
+   (* addr: reset *) new_addrarray
+   (* call: reset *) new_callstack
+   (* ip: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* dp: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* data: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* sp: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* pc: reset *) 〈〈xF,xF〉:〈xF,x0〉〉
+   (* speed: reset *) x3
+   (* page: reset *) o7
+   (* H: reset *) false
+   (* Z: reset *) false
+   (* C: reset *) false
+   (* skip mode: reset *) false)
+   (* mem *) mem
+   (* chk *) chk
+   (* clk: reset *) (None ?)).
+
+(* 
+   cio' che non viene resettato mantiene il valore precedente: nella documentazione
+   viene riportato come "unaffected"/"indeterminate"/"unpredictable"
+   il soft RESET e' diverso da un calo di tensione e la ram non variera'
+*)
+ndefinition reset_of_model_IP2022 ≝
+λt:memory_impl.λs:any_status IP2022 t.
+ (mk_any_status IP2022 t
+  (mk_alu_IP2022
+   (* acc_low: reset *) 〈x0,x0〉
+   (* mulh: reset *) 〈x0,x0〉
+   (* addrsel: reset *) 〈x0,x0〉
+   (* addr: reset *) new_addrarray
+   (* call: reset *) new_callstack
+   (* ip: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* dp: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* data: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* sp: reset *) 〈〈x0,x0〉:〈x0,x0〉〉
+   (* pc: reset *) 〈〈xF,xF〉:〈xF,x0〉〉
+   (* speed: reset *) x3
+   (* page: reset *) o7
+   (* H: reset *) false
+   (* Z: reset *) false
+   (* C: reset *) false
+   (* skip mode: reset *) false)
+   (* mem: inv. *) (mem_desc ? t s)
+   (* chk: inv. *) (chk_desc ? t s)
+   (* clk: reset *) (None ?)).
diff --git a/helm/software/matita/contribs/ng_assembly/emulator/model/RS08_model.ma b/helm/software/matita/contribs/ng_assembly/emulator/model/RS08_model.ma
new file mode 100755
index 000000000..da72476ef
--- /dev/null
+++ b/helm/software/matita/contribs/ng_assembly/emulator/model/RS08_model.ma
@@ -0,0 +1,98 @@
+(**************************************************************************)
+(*       ___                                                              *)
+(*      ||M||                                                             *)
+(*      ||A||       A project by Andrea Asperti                           *)
+(*      ||T||                                                             *)
+(*      ||I||       Developers:                                           *)
+(*      ||T||         The HELM team.                                      *)
+(*      ||A||         http://helm.cs.unibo.it                             *)
+(*      \   /                                                             *)
+(*       \ /        This file is distributed under the terms of the       *)
+(*        v         GNU General Public License Version 2                  *)
+(*                                                                        *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(*                          Progetto FreeScale                            *)
+(*                                                                        *)
+(*   Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it              *)
+(*   Sviluppo: 2008-2010                                                  *)
+(*                                                                        *)
+(* ********************************************************************** *)
+
+include "emulator/status/status.ma".
+
+(* *********************************** *)
+(* IMPOSTAZIONI SPECIFICHE DEI MODELLI *)
+(* *********************************** *)
+
+(* modelli di RS08 *)
+ninductive RS08_model : Type ≝
+  MC9RS08KA1 : RS08_model
+| MC9RS08KA2 : RS08_model.
+
+(* memoria dei RS08 *)
+ndefinition memory_type_of_FamilyRS08 ≝
+λm:RS08_model.match m with
+ [ MC9RS08KA1 ⇒
+  [
+(* 0x0000-0x000E *)   triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x0,x0〉〉〉 〈〈x0,x0〉:〈x0,xF〉〉 MEM_READ_WRITE (* 15B RAM *)
+(* 0x0010-0x001E *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x1,x0〉〉〉 〈〈x0,x0〉:〈x0,xF〉〉 MEM_READ_WRITE (* 15B MEMORY MAPPED IO *)
+(* 0x0020-0x004F *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x2,x0〉〉〉 〈〈x0,x0〉:〈x3,x0〉〉 MEM_READ_WRITE (* 48B RAM *)
+(* 0x00C0-0x00FF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈xC,x0〉〉〉 〈〈x0,x0〉:〈x4,x0〉〉 MEM_READ_WRITE (* 64B RAM PAGING *)
+(* 0x0200-0x023F *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x2〉:〈x0,x0〉〉〉 〈〈x0,x0〉:〈x4,x0〉〉 MEM_READ_WRITE (* 64B MEMORY MAPPED IO *)
+(* 0x3C00-0x3FFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x3,xC〉:〈x0,x0〉〉〉 〈〈x0,x4〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 1024B FLASH *) ]
+  | MC9RS08KA2 ⇒
+   [ 
+(* 0x0000-0x000E *)   triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x0,x0〉〉〉 〈〈x0,x0〉:〈x0,xF〉〉 MEM_READ_WRITE (* 15B RAM *)
+(* 0x0010-0x001E *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x1,x0〉〉〉 〈〈x0,x0〉:〈x0,xF〉〉 MEM_READ_WRITE (* 15B MEMORY MAPPED IO *)
+(* 0x0020-0x004F *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈x2,x0〉〉〉 〈〈x0,x0〉:〈x3,x0〉〉 MEM_READ_WRITE (* 48B RAM *)
+(* 0x00C0-0x00FF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x0〉:〈xC,x0〉〉〉 〈〈x0,x0〉:〈x4,x0〉〉 MEM_READ_WRITE (* 64B RAM PAGING *)
+(* 0x0200-0x023F *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x0,x2〉:〈x0,x0〉〉〉 〈〈x0,x0〉:〈x4,x0〉〉 MEM_READ_WRITE (* 64B MEMORY MAPPED IO *)
+(* 0x3800-0x3FFF *) ; triple … 〈〈〈x0,x0〉:〈x0,x0〉〉.〈〈x3,x8〉:〈x0,x0〉〉〉 〈〈x0,x8〉:〈x0,x0〉〉 MEM_READ_ONLY  (* 2048B FLASH *) ]
+  ].
+
+(* 
+   parametrizzati i non deterministici rispetto a tutti i valori casuali
+   che verranno dati dall'esterno di tipo byte8 (ndby1-2) e bool (ndbo1-5).
+   l'ACCENSIONE e' totalmente equivalente ad un reset causato da calo di tensione
+   (reset V-low), la memoria ed il check possono essere passati
+*)
+ndefinition start_of_model_RS08 ≝
+λmcu:RS08_model.λt:memory_impl.
+λmem:aux_mem_type t.λchk:aux_chk_type t.
+λndby1,ndby2:byte8.λirqfl,ndbo1,ndbo2,ndbo3,ndbo4,ndbo5:bool.
+ (mk_any_status RS08 t
+  (mk_alu_RS08
+   (* acc_low: reset *)  〈x0,x0〉
+   (* pc: reset *) 〈〈x3,xF〉:〈xF,xD〉〉
+   (* pcm *) 〈〈x3,xF〉:〈xF,xF〉〉
+   (* spc: reset *) 〈〈x3,xF〉:〈xF,xD〉〉
+   (* xm: reset *) 〈x0,x0〉
+   (* psm: *) 〈x8,x0〉
+   (* Z: reset *) false
+   (* C: reset *) false)
+   (* mem *) mem
+   (* chk *) chk
+   (* clk: reset *) (None ?)).
+
+(* 
+   cio' che non viene resettato mantiene il valore precedente: nella documentazione
+   viene riportato come "unaffected"/"indeterminate"/"unpredictable"
+   il soft RESET e' diverso da un calo di tensione e la ram non variera'
+*)
+ndefinition reset_of_model_RS08 ≝
+λt:memory_impl.λs:any_status RS08 t.
+ (mk_any_status RS08 t
+  (mk_alu_RS08
+   (* acc_low: reset *) 〈x0,x0〉
+   (* pc: reset *) 〈〈x3,xF〉:〈xF,xD〉〉
+   (* pcm *) (pc_mask_RS08 (alu ? t s))
+   (* spc: reset *) 〈〈x3,xF〉:〈xF,xD〉〉
+   (* xm: reset *) 〈x0,x0〉
+   (* psm: reset *) 〈x8,x0〉
+   (* Z: reset *) false
+   (* C: reset *) false)
+   (* mem: inv. *) (mem_desc ? t s)
+   (* chk: inv. *) (chk_desc ? t s)
+   (* clk: reset *) (None ?)).
diff --git a/helm/software/matita/contribs/ng_assembly/emulator/model/model.ma b/helm/software/matita/contribs/ng_assembly/emulator/model/model.ma
new file mode 100755
index 000000000..a9d6803e2
--- /dev/null
+++ b/helm/software/matita/contribs/ng_assembly/emulator/model/model.ma
@@ -0,0 +1,88 @@
+(**************************************************************************)
+(*       ___                                                              *)
+(*      ||M||                                                             *)
+(*      ||A||       A project by Andrea Asperti                           *)
+(*      ||T||                                                             *)
+(*      ||I||       Developers:                                           *)
+(*      ||T||         The HELM team.                                      *)
+(*      ||A||         http://helm.cs.unibo.it                             *)
+(*      \   /                                                             *)
+(*       \ /        This file is distributed under the terms of the       *)
+(*        v         GNU General Public License Version 2                  *)
+(*                                                                        *)
+(**************************************************************************)
+
+(* ********************************************************************** *)
+(*                          Progetto FreeScale                            *)
+(*                                                                        *)
+(*   Sviluppato da: Ing. Cosimo Oliboni, oliboni@cs.unibo.it              *)
+(*   Sviluppo: 2008-2010                                                  *)
+(*                                                                        *)
+(* ********************************************************************** *)
+
+include "emulator/model/HC05_model.ma".
+include "emulator/model/HC08_model.ma".
+include "emulator/model/HCS08_model.ma".
+include "emulator/model/RS08_model.ma".
+include "emulator/model/IP2022_model.ma".
+
+(* *********************************** *)
+(* IMPOSTAZIONI SPECIFICHE DEI MODELLI *)
+(* *********************************** *)
+
+(* raggruppamento dei modelli *)
+ndefinition aux_model_type ≝
+λm:mcu_type.match m with
+ [ HC05   ⇒ HC05_model
+ | HC08   ⇒ HC08_model
+ | HCS08  ⇒ HCS08_model
+ | RS08   ⇒ RS08_model
+ | IP2022 ⇒ IP2022_model
+ ].
+
+(* ∀modello.descrizione della memoria installata *)
+ndefinition memory_type_of_model ≝
+λm:mcu_type.
+ match m
+  return λm.aux_model_type m → ?
+ with
+ [ HC05   ⇒ memory_type_of_FamilyHC05
+ | HC08   ⇒ memory_type_of_FamilyHC08
+ | HCS08  ⇒ memory_type_of_FamilyHCS08
+ | RS08   ⇒ memory_type_of_FamilyRS08
+ | IP2022 ⇒ memory_type_of_FamilyIP2022
+ ].
+
+(* dato un modello costruisce un descrittore a partire dalla lista precedente *)
+nlet rec build_memory_type_of_model_aux t param (result:aux_chk_type t) on param ≝
+ match param with
+  [ nil ⇒ result
+  | cons hd tl ⇒ 
+   build_memory_type_of_model_aux t tl
+    (check_update_ranged t result (fst3T ??? hd) (snd3T ??? hd) (thd3T ??? hd)) ].
+
+ndefinition build_memory_type_of_model ≝
+λm:mcu_type.λmcu:aux_model_type m.λt:memory_impl.
+ build_memory_type_of_model_aux t (memory_type_of_model m mcu) (out_of_bound_memory t).
+
+ndefinition start_of_model ≝
+λm:mcu_type.
+ match m
+  return λm.aux_model_type m → ?
+ with
+ [ HC05   ⇒ start_of_model_HC05
+ | HC08   ⇒ start_of_model_HC08
+ | HCS08  ⇒ start_of_model_HCS08
+ | RS08   ⇒ start_of_model_RS08
+ | IP2022 ⇒ start_of_model_IP2022
+ ].
+
+ndefinition reset_of_model ≝
+λm:mcu_type.
+ match m return λm.Πt.(any_status m t) → ? with
+  [ HC05   ⇒ reset_of_model_HC05
+  | HC08   ⇒ reset_of_model_HC08
+  | HCS08  ⇒ reset_of_model_HCS08
+  | RS08   ⇒ reset_of_model_RS08
+  | IP2022 ⇒ reset_of_model_IP2022
+  ].